uqadd8

Unsigned Saturating Add 8

UQADD8<c> <Rd>, <Rn>, <Rm>

Unsigned saturating add of 4 bytes.

Details

Performs parallel saturating addition of four unsigned 8-bit bytes from Rn and Rm, storing results in Rd. Each byte is independently saturated to the unsigned 8-bit range [0, 255] if overflow occurs. No condition flags are affected. Execution restricted to A32 with DSP extension; requires ARMv6 or later.

Pseudocode Operation

Rd[31:24] ← UnsignedSat(Rn[31:24] + Rm[31:24], 8)
Rd[23:16] ← UnsignedSat(Rn[23:16] + Rm[23:16], 8)
Rd[15:8] ← UnsignedSat(Rn[15:8] + Rm[15:8], 8)
Rd[7:0] ← UnsignedSat(Rn[7:0] + Rm[7:0], 8)

Example

UQADD8 r0, r1, r2

Encoding

Binary Layout
cond
01100
110
Rn
Rd
1
1
1
1
1
00
1
Rm
 
Format SIMD Integer
Opcode 0x06600F90
Extension A32 (DSP)

Operands

  • Rd
    Destination general-purpose register
  • Rn
    First source / base general-purpose register
  • Rm
    Second source / offset general-purpose register

Reference (Arm AArch32 ISA)

Instruction Forms

Encoding Instruction ISA Bit pattern
0x06600F90 UQADD8{<c>}{<q>} {<Rd>,} <Rn>, <Rm> A32 cond | 01100 | 110 | Rn | Rd | 1 | 1 | 1 | 1 | 1 | 00 | 1 | Rm
0xFA80F050 UQADD8{<c>}{<q>} {<Rd>,} <Rn>, <Rm> T32 111110101 | 000 | Rn | 1111 | Rd | 0 | 1 | 0 | 1 | Rm

Description

Unsigned Saturating Add 8 performs four unsigned 8-bit integer additions, saturates the results to the 8-bit unsigned integer range 0 <= x <= 28 - 1, and writes the results to the destination register.

Operation

if ConditionPassed() then
    EncodingSpecificOperations();
    sum1 = UInt(R[n]<7:0>) + UInt(R[m]<7:0>);
    sum2 = UInt(R[n]<15:8>) + UInt(R[m]<15:8>);
    sum3 = UInt(R[n]<23:16>) + UInt(R[m]<23:16>);
    sum4 = UInt(R[n]<31:24>) + UInt(R[m]<31:24>);
    R[d]<7:0>   = UnsignedSat(sum1, 8);
    R[d]<15:8>  = UnsignedSat(sum2, 8);
    R[d]<23:16> = UnsignedSat(sum3, 8);
    R[d]<31:24> = UnsignedSat(sum4, 8);