sm3ss1

SM3 Step 1 (A32)

SM3SS1.32 <Qd>, <Qn>, <Qm>

SM3 cryptographic hash step 1.

Details

The SM3 Step 1 instruction sM3 cryptographic hash step 1.

Pseudocode Operation

// SM3 cryptographic hash step 1

Example

SM3SS1.32 q0, q1, q2

Encoding

Binary Layout
11110010
0
0
10
Vn
Vd
1100
N
Q
M
0
Vm
 
Format Crypto 3-Reg
Opcode 0xF2200C00
Extension Crypto (SM3)

Operands

  • Qd
    Destination 128-bit SIMD register
  • Qn
    First source 128-bit SIMD register
  • Qm
    Second source 128-bit SIMD register