ubfx

Unsigned Bit Field Extract (Thumb)

UBFX <Rd>, <Rn>, #<lsb>, #<width>

Extracts and zero-extends bits.

Details

Unsigned Bit Field Extract: Extracts a bit field from Rn starting at bit position lsb with width width, zero-extends the result, and writes it to Rd. The condition flags are not affected. This instruction is available in Thumb state (T32) and A32.

Pseudocode Operation

lsb_val ← ZeroExtend(imm3:imm2, 6)
width_val ← ZeroExtend(width, 5)
extracted ← (Rn >> lsb_val)[width_val-1:0]
Rd ← ZeroExtend(extracted, 32)

Example

UBFX r0, r1, #0, #width

Encoding

Binary Layout
11110
0
11
11
0
0
Rn
0
imm3
Rd
imm2
0
widthm1
 
Format Thumb Bitfield
Opcode 0xF3C00000
Extension A32 (Base)

Operands

  • Rd
    Destination general-purpose register
  • Rn
    First source / base general-purpose register

Reference (Arm AArch32 ISA)

Instruction Forms

Encoding Instruction ISA Bit pattern
0x07E00050 UBFX{<c>}{<q>} <Rd>, <Rn>, #<lsb>, #<width> A32 cond | 01111 | 1 | 1 | widthm1 | Rd | lsb | 101 | Rn
0xF3C00000 UBFX{<c>}{<q>} <Rd>, <Rn>, #<lsb>, #<width> T32 11110 | 0 | 11 | 11 | 0 | 0 | Rn | 0 | imm3 | Rd | imm2 | 0 | widthm1

Description

Unsigned Bit Field Extract extracts any number of adjacent bits at any position from a register, zero-extends them to 32 bits, and writes the result to the destination register.

Operation

if ConditionPassed() then
    EncodingSpecificOperations();
    R[d] = ZeroExtend(R[n]<msbit:lsbit>, 32);