ldrd

Load Register Dual (A32)

LDRD<c> <Rt>, <Rt2>, [<Rn>, #+/-<imm>]

Loads two consecutive words into consecutive registers.

Details

The Load Register Dual instruction loads two consecutive words into consecutive registers.

Pseudocode Operation

Rt ← Memory[address]

Example

LDRD r3, r4, [r1, #+/-#16]

Encoding

Binary Layout
cond
000
P
U
1
W
0
Rn
Rt
imm4H
1101
imm4L
 
Format Load/Store
Opcode 0x004000D0
Extension A32 (Base)

Operands

  • Rt
    Dest 1
  • Rt2
    Dest 2
  • Rn
    First source / base general-purpose register