dmb
Data Memory Barrier
DMB <option>
Ensures memory access ordering.
Pseudocode Operation
Barrier(option)
Example
DMB option
Encoding
Binary Layout
11010101000000110011
31:12
CRm
11:8
1
7
01
6:5
11111
4:0
Operands
-
option
Barrier type (SY, ISH, etc)
Related
Other forms of dmb
Across architectures
Memory Barrier / Fence : how x86, ARM, RISC-V, and PowerISA each do this.
More in Base
Reference
View in Arm A64 ISA Reference ↗
Arm A64 ISA
Instruction Forms
| Encoding | Instruction | ISA | Bit pattern | ||
|---|---|---|---|---|---|
| 0xD50330BF | DMB (<option>|#<imm>) | A64 | 11010101000000110011 | CRm | 1 | 01 | 11111 |
Description
Data Memory Barrier is a memory barrier that ensures the ordering of observations of memory accesses, see Data Memory Barrier.
Operation
DataMemoryBarrier(domain, types);