eor

Bitwise Exclusive OR (Immediate)

EOR <Wd|Wsp>, <Wn>, #<imm>

XORs register with immediate.

Details

Bitwise Exclusive OR (Immediate) performs a logical XOR between a 32-bit register and a bitmask immediate, writing the result to the destination register. This instruction does not affect the condition flags. It executes in AArch64 state and is available at all privilege levels.

Pseudocode Operation

Wd ← Wn XOR imm

Example

EOR Wd, w1, #16

Encoding

Binary Layout
0
10
100100
0
immr
imms
Rn
Rd
 
Format Logical (Immediate)
Opcode 0x52000000
Extension Base

Operands

  • Wd
    Destination 32-bit integer register
  • Wn
    First source / base 32-bit integer register
  • imm
    Imm

Reference (Arm A64 ISA)

Instruction Forms

Encoding Instruction ISA Bit pattern
0x2E201C00 EOR <Vd>.<T>, <Vn>.<T>, <Vm>.<T> A64 0 | Q | 1 | 01110 | 00 | 1 | Rm | 00011 | 1 | Rn | Rd
0x52000000 EOR <Wd|WSP>, <Wn>, #<imm> A64 0 | 10 | 100100 | 0 | immr | imms | Rn | Rd
0xD2000000 EOR <Xd|SP>, <Xn>, #<imm> A64 1 | 10 | 100100 | N | immr | imms | Rn | Rd
0x4A000000 EOR <Wd>, <Wn>, <Wm>{, <shift> #<amount>} A64 0 | 10 | 01010 | shift | 0 | Rm | imm6 | Rn | Rd
0xCA000000 EOR <Xd>, <Xn>, <Xm>{, <shift> #<amount>} A64 1 | 10 | 01010 | shift | 0 | Rm | imm6 | Rn | Rd
0x25004200 EOR <Pd>.B, <Pg>/Z, <Pn>.B, <Pm>.B A64 00100101 | 0 | 0 | 00 | Pm | 01 | Pg | 1 | Pn | 0 | Pd
0x04190000 EOR <Zdn>.<T>, <Pg>/M, <Zdn>.<T>, <Zm>.<T> A64 00000100 | size | 011 | 00 | 1 | 000 | Pg | Zm | Zdn
0x05400000 EOR <Zdn>.<T>, <Zdn>.<T>, #<const> A64 00000101 | 0 | 1 | 0000 | imm13 | Zdn
0x04A03000 EOR <Zd>.D, <Zn>.D, <Zm>.D A64 00000100 | 1 | 0 | 1 | Zm | 001100 | Zn | Zd

Description

Bitwise Exclusive-OR (immediate) performs a bitwise exclusive-OR of a register value and an immediate value, and writes the result to the destination register.

Operation

bits(datasize) result;
bits(datasize) operand1 = X[n, datasize];

result = operand1 EOR imm;

if d == 31 then
    SP[] = ZeroExtend(result, 64);
else
    X[d, datasize] = result;