trn1

Vector Transpose 1

TRN1 <Vd>.<T>, <Vn>.<T>, <Vm>.<T>

Transposes elements (Lower).

Details

The Vector Transpose 1 instruction transposes elements (Lower).

Pseudocode Operation

// Transposes elements (Lower)

Example

TRN1 v0.4s.T, v1.4s.T, v2.4s.T

Encoding

Binary Layout
0
Q
001110
size
0
Rm
0010
10
Rn
Rd
 
Format SIMD Permute
Opcode 0x0E002800
Extension NEON (SIMD)

Operands

  • Vd
    Destination SIMD/FP vector register
  • Vn
    First source SIMD/FP vector register
  • Vm
    Second source SIMD/FP vector register