rev
Reverse Bytes (Thumb)
REV <Rd>, <Rm>
Reverses bytes (Endian swap).
Details
Reverses the byte order of a 32-bit word (equivalent to endian conversion). No condition flags are affected. This is a 32-bit Thumb instruction available in ARMv6 and later.
Pseudocode Operation
Rd[31:24] ← Rm[7:0]
Rd[23:16] ← Rm[15:8]
Rd[15:8] ← Rm[23:16]
Rd[7:0] ← Rm[31:24]
Example
REV r0, r2
Encoding
Binary Layout
111110101
001
Rn
1111
Rd
10
00
Rm
Operands
-
Rd
Destination general-purpose register -
Rm
Second source / offset general-purpose register
Reference (Arm AArch32 ISA)
Instruction Forms
| Encoding | Instruction | ISA | Bit pattern | ||
|---|---|---|---|---|---|
| 0x06BF0F30 | REV{<c>}{<q>} <Rd>, <Rm> | A32 | cond | 01101 | 0 | 11 | 1 | 1 | 1 | 1 | Rd | 1 | 1 | 1 | 1 | 0 | 011 | Rm | ||
| 0xBA00 | REV{<c>}{<q>} <Rd>, <Rm> | T32 | 10111010 | 00 | Rm | Rd | ||
| 0xFA90F080 | REV{<c>}.W <Rd>, <Rm> | T32 | 111110101 | 001 | Rn | 1111 | Rd | 10 | 00 | Rm |
Description
Byte-Reverse Word reverses the byte order in a 32-bit register.
Operation
if ConditionPassed() then
EncodingSpecificOperations();
bits(32) result;
result<31:24> = R[m]<7:0>;
result<23:16> = R[m]<15:8>;
result<15:8> = R[m]<23:16>;
result<7:0> = R[m]<31:24>;
R[d] = result;