A32 (Base) Instructions

104 ARM instructions in this extension - showing 100 per page, page 1 of 2 - click any row for encoding, pseudocode, and full documentation.

Mnemonic ⇅	Syntax	Format ⇅	Summary
adc	ADC{S}<c> <Rd>, <Rn>, <Rm> {, <shift>}	Data Proc	Adds two 32-bit values and the Carry flag.
add	ADD{S}<c> <Rd>, <Rn>, <Rm> {, <shift>}	Data Proc	Adds two 32-bit values.
adr	ADR<c> <Rd>, <label>	Data Proc	Adds an immediate value to the PC register.
and	AND{S}<c> <Rd>, <Rn>, <Rm> {, <shift>}	Data Proc	Performs a bitwise AND on two 32-bit values.
asr	ASR{S}<c> <Rd>, <Rm>, <Rs>	Data Proc	Arithmetic right shift (sign-extending).
b	B<c> <label>	Branch	Branch relative (PC +/- 32MB).
bfc	BFC <Rd>, #<lsb>, #<width>	Thumb Bitfield	Clears a bitfield in a register.
bfc	BFC<c> <Rd>, #<lsb>, #<width>	Data Proc	Clears a bitfield in a register.
bfi	BFI <Rd>, <Rn>, #<lsb>, #<width>	Thumb Bitfield	Inserts a bitfield into a register.
bfi	BFI<c> <Rd>, <Rn>, #<lsb>, #<width>	Data Proc	Copies a bitfield into a register.
bic	BIC{S}<c> <Rd>, <Rn>, <Rm> {, <shift>}	Data Proc	Performs AND NOT (Rd = Rn & ~Rm).
bkpt	BKPT #<imm>	System	Causes a software breakpoint.
bl	BL<c> <label>	Branch	Calls a subroutine, storing return address in LR (R14).
blx	BLX<c> <Rm>	Branch	Calls subroutine and optionally switches to Thumb state.
bx	BX<c> <Rm>	Branch	Branches to address in register, optionally switching ISA.
clrex	CLREX<c>	System	Clears the local exclusive access monitor.
clz	CLZ <Rd>, <Rm>	Thumb Misc	Counts consecutive zeros.
clz	CLZ<c> <Rd>, <Rm>	Data Proc	Counts the number of consecutive zeros from MSB.
cmn	CMN<c> <Rn>, <Rm> {, <shift>}	Data Proc	Adds two values and updates flags (discarding result). Same as ADDS with no destination.
cmp	CMP<c> <Rn>, <Rm> {, <shift>}	Data Proc	Subtracts two values and updates flags (discarding result).
dbg	DBG #<option>	System Hint	Provides a hint to the debug system.
dmb	DMB <option>	Thumb System	Memory barrier (Thumb).
dmb	DMB <option>	System	Ensures memory access ordering.
dsb	DSB <option>	Thumb System	Sync barrier (Thumb).
dsb	DSB <option>	System	Ensures completion of memory accesses.
eor	EOR{S}<c> <Rd>, <Rn>, <Rm> {, <shift>}	Data Proc	Performs bitwise XOR.
hlt	HLT #<imm>	System	Enters halting debug state (A32 encoding).
isb	ISB <option>	Thumb System	Instruction barrier (Thumb).
isb	ISB <option>	System	Flushes the pipeline.
ldm	LDM<mode><c> <Rn>{!}, <registers>	Load Multiple	Loads multiple registers from memory (Stack pop).
ldr	LDR<c> <Rt>, <label>	Load Literal	Loads a word from a label.
ldr	LDR<c> <Rt>, [<Rn>, #+/-<imm>]{!}	Load/Store	Loads a word from memory.
ldrb	LDRB<c> <Rt>, [<Rn>, #+/-<imm>]	Load/Store	Loads a byte from memory (Zero extended).
ldrbt	LDRBT<c> <Rt>, [<Rn>, #+/-<imm>]	Load/Store	Loads a byte using User Mode permissions.
ldrd	LDRD <Rt>, <Rt2>, [<Rn>, #+/-<imm>]	Thumb Load	Loads two words from memory (Thumb).
ldrd	LDRD<c> <Rt>, <Rt2>, [<Rn>, #+/-<imm>]	Load/Store	Loads two consecutive words into consecutive registers.
ldrh	LDRH<c> <Rt>, [<Rn>, #+/-<imm>]	Load/Store	Loads a halfword (Zero extended).
ldrht	LDRHT<c> <Rt>, [<Rn>, #+/-<imm>]	Load/Store	Loads a halfword using User Mode permissions.
ldrsb	LDRSB<c> <Rt>, [<Rn>, #+/-<imm>]	Load/Store	Loads a byte and sign-extends it.
ldrsbt	LDRSBT<c> <Rt>, [<Rn>, #+/-<imm>]	Load/Store	Loads a signed byte using User Mode permissions.
ldrsh	LDRSH<c> <Rt>, [<Rn>, #+/-<imm>]	Load/Store	Loads a halfword and sign-extends it.
ldrsht	LDRSHT<c> <Rt>, [<Rn>, #+/-<imm>]	Load/Store	Loads a signed halfword using User Mode permissions.
ldrt	LDRT<c> <Rt>, [<Rn>, #+/-<imm>]	Load/Store	Loads a word using User Mode permissions (even if Privileged).
lsl	LSL{S}<c> <Rd>, <Rm>, <Rs>	Data Proc	Shifts a register left.
lsr	LSR{S}<c> <Rd>, <Rm>, <Rs>	Data Proc	Shifts a register right.
mla	MLA <Rd>, <Rm>, <Ra>, <Rn>	Thumb Mul	Rd = Rn + (Rm * Ra).
mla	MLA{S}<c> <Rd>, <Rn>, <Rm>, <Ra>	Multiply	Calculates Rd = (Rn * Rm) + Ra.
mls	MLS <Rd>, <Rm>, <Ra>, <Rn>	Thumb Mul	Rd = Rn - (Rm * Ra).
mls	MLS<c> <Rd>, <Rn>, <Rm>, <Ra>	Multiply	Calculates Rd = Ra - (Rn * Rm).
mov	MOV{S}<c> <Rd>, <Operand2>	Data Proc	Moves a value into a register.
movt	MOVT<c> <Rd>, #<imm16>	Data Proc	Writes a 16-bit immediate to the top half of a register.
movw	MOVW<c> <Rd>, #<imm16>	Data Proc	Writes a 16-bit immediate to the bottom half, zeroing top.
mul	MUL{S}<c> <Rd>, <Rn>, <Rm>	Multiply	Multiplies two 32-bit values.
mvn	MVN{S}<c> <Rd>, <Operand2>	Data Proc	Moves bitwise inverse of value.
nop	NOP<c>	System	Does nothing.
orr	ORR{S}<c> <Rd>, <Rn>, <Operand2>	Data Proc	Performs bitwise OR.
pldw	PLDW [<Rn>, #<imm>]	Load/Store	Hints memory system to bring data into cache for writing.
pop	POP<c> <registers>	Load Multiple	Loads registers from stack (Alias for LDMIA SP!).
push	PUSH<c> <registers>	Store Multiple	Stores registers to stack (Alias for STMDB SP!).
rbit	RBIT <Rd>, <Rm>	Thumb Misc	Reverses bits in a 32-bit register.
rbit	RBIT<c> <Rd>, <Rm>	Data Proc	Reverses bits in a 32-bit register.
rev	REV <Rd>, <Rm>	Thumb Misc	Reverses bytes (Endian swap).
rev	REV<c> <Rd>, <Rm>	Data Proc	Reverses bytes (Endian swap).
rev16	REV16 <Rd>, <Rm>	Thumb Misc	Reverses bytes in each 16-bit halfword.
revsh	REVSH <Rd>, <Rm>	Thumb Misc	Reverses bytes in low halfword and sign-extends.
ror	ROR{S}<c> <Rd>, <Rm>, <Rs>	Data Proc	Rotates register right.
rrx	RRX{S}<c> <Rd>, <Rm>	Data Proc	Shifts register right by 1, inserting Carry flag into MSB.
rsb	RSB{S}<c> <Rd>, <Rn>, <Operand2>	Data Proc	Calculates Rd = Operand2 - Rn.
rsc	RSC{S}<c> <Rd>, <Rn>, <Operand2>	Data Proc	Calculates Rd = Operand2 - Rn - NOT(Carry).
sbc	SBC{S}<c> <Rd>, <Rn>, <Operand2>	Data Proc	Calculates Rd = Rn - Operand2 - NOT(Carry).
sbfx	SBFX<c> <Rd>, <Rn>, #<lsb>, #<width>	Data Proc	Extracts bits from a register and sign-extends them.
sbfx	SBFX <Rd>, <Rn>, #<lsb>, #<width>	Thumb Bitfield	Extracts and sign-extends bits.
sdiv	SDIV <Rd>, <Rn>, <Rm>	Thumb Div	Signed integer division.
sdiv	SDIV<c> <Rd>, <Rn>, <Rm>	Data Proc	Signed integer division.
sev	SEV	System Hint	Sends an event to all processors.
sevl	SEVL	System Hint	Sends an event locally.
smlal	SMLAL <RdLo>, <RdHi>, <Rn>, <Rm>	Thumb Mul	Signed Multiply Accumulate (64-bit result).
smull	SMULL <RdLo>, <RdHi>, <Rn>, <Rm>	Thumb Mul	Signed Multiply (64-bit result).
stm	STM<mode><c> <Rn>{!}, <registers>	Store Multiple	Stores multiple registers to memory.
str	STR<c> <Rt>, [<Rn>, #+/-<imm>]{!}	Load/Store	Stores a word to memory.
strbt	STRBT<c> <Rt>, [<Rn>, #+/-<imm>]	Load/Store	Stores a byte using User Mode permissions.
strd	STRD <Rt>, <Rt2>, [<Rn>, #+/-<imm>]	Thumb Store	Stores two words to memory (Thumb).
strht	STRHT<c> <Rt>, [<Rn>, #+/-<imm>]	Load/Store	Stores a halfword using User Mode permissions.
strt	STRT<c> <Rt>, [<Rn>, #+/-<imm>]	Load/Store	Stores a word using User Mode permissions.
sub	SUB{S}<c> <Rd>, <Rn>, <Operand2>	Data Proc	Subtracts two values.
subs	SUBS PC, LR, #<imm>	Data Proc	Subs PC, LR, #imm (Exception return mechanism).
sxtb	SXTB<c> <Rd>, <Rm> {, <rotation>}	Data Proc	Sign-extends the low byte (8-bits) to 32-bits.
sxth	SXTH<c> <Rd>, <Rm> {, <rotation>}	Data Proc	Sign-extends the low halfword (16-bits) to 32-bits.
teq	TEQ<c> <Rn>, <Operand2>	Data Proc	Bitwise Exclusive OR and update flags (discard result).
tst	TST<c> <Rn>, <Operand2>	Data Proc	Bitwise AND and update flags (discard result).
ubfx	UBFX<c> <Rd>, <Rn>, #<lsb>, #<width>	Data Proc	Extracts bits from a register and zero-extends them.
ubfx	UBFX <Rd>, <Rn>, #<lsb>, #<width>	Thumb Bitfield	Extracts and zero-extends bits.
udf	UDF #<imm>	System	Permanently undefined instruction (generates Undefined Instruction exception).
udiv	UDIV <Rd>, <Rn>, <Rm>	Thumb Div	Unsigned integer division.
udiv	UDIV<c> <Rd>, <Rn>, <Rm>	Data Proc	Unsigned integer division.
umlal	UMLAL <RdLo>, <RdHi>, <Rn>, <Rm>	Thumb Mul	Unsigned Multiply Accumulate (64-bit result).
umlal	UMLAL{S}<c> <RdLo>, <RdHi>, <Rn>, <Rm>	Multiply	Unsigned (Rn * Rm) + 64-bit Accumulator.
umull	UMULL <RdLo>, <RdHi>, <Rn>, <Rm>	Thumb Mul	Unsigned Multiply (64-bit result).
umull	UMULL{S}<c> <RdLo>, <RdHi>, <Rn>, <Rm>	Multiply	Unsigned (Rn * Rm) -> 64-bit Result.
uxtb	UXTB<c> <Rd>, <Rm> {, <rotation>}	Data Proc	Zero-extends the low byte to 32-bits.