push

Push Multiple Registers (A32)

PUSH<c> <registers>

Stores registers to stack (Alias for STMDB SP!).

Pseudocode Operation

address ← SP - (4 × number_of_registers_in_list)
for each register in register_list (in ascending order)
  [address] ← register
  address ← address + 4
endfor
SP ← SP - (4 × number_of_registers_in_list)

Example

PUSH registers

Encoding

Binary Layout
cond
31:28
100
27:25
1
24
0
23
0
22
1
21
0
20
1101
19:16
register_list
15:0
 
Format Store Multiple
Opcode 0x092D0000
Extension A32 (Base)

Operands

  • registers
    List

Related

Other forms of push

More in A32 (Base)

Reference

View in Arm A64 ISA Reference ↗ Arm AArch32 ISA

Instruction Forms

Encoding Instruction ISA Bit pattern
0xB400 PUSH{<c>}{<q>} <registers> T32 1011 | 0 | 10 | M | register_list
0x092D0000 PUSH{<c>}{<q>} <registers> A32 cond | 100 | 1 | 0 | 0 | 1 | 0 | 1101 | register_list
0xE92D0000 PUSH{<c>}.W <registers> T32 1110100 | 10 | 0 | 1 | 0 | 1101 | 0 | M | register_list
0x052D0004 PUSH{<c>}{<q>} <single_register_list> A32 cond | 010 | 1 | 0 | 0 | 1 | 0 | 1101 | Rt | 000000000100
0xF84D0D04 PUSH{<c>}{<q>} <single_register_list> T32 111110000 | 10 | 0 | 1101 | Rt | 1 | 1 | 0 | 1 | 00000100

Description

Stores multiple general-purpose registers to the stack, storing to consecutive memory locations ending just below the address in SP, and updates SP to point to the start of the stored data