eor

Vector Bitwise Exclusive OR

EOR <Vd>.<T>, <Vn>.<T>, <Vm>.<T>

Bitwise XOR of two vectors.

Details

The Vector Bitwise Exclusive OR instruction bitwise XOR of two vectors.

Pseudocode Operation

Vd ← Vn XOR Vm

Example

EOR v0.4s.T, v1.4s.T, v2.4s.T

Encoding

Binary Layout
0
Q
101110
00
1
Rm
0001
1
Rn
Rd
 
Format SIMD Three Register
Opcode 0x2E201C00
Extension NEON (SIMD)

Operands

  • Vd
    Destination SIMD/FP vector register
  • Vn
    First source SIMD/FP vector register
  • Vm
    Second source SIMD/FP vector register