ext
Extract Vector
Extracts a vector from a pair of vectors (Sliding window).
Pseudocode Operation
concatenated ← (Vn || Vm)
byte_index ← index
if Q == 1 then
result_bytes ← 16
else
result_bytes ← 8
for i = 0 to result_bytes - 1 do
Vd[i] ← concatenated[byte_index + i]
N ← unaffected; Z ← unaffected; C ← unaffected; V ← unaffected
Example
Encoding
Operands
-
Vd
Destination SIMD/FP vector register -
Vn
Low Src -
Vm
High Src -
index
Byte Offset
Reference
Instruction Forms
| Encoding | Instruction | ISA | Bit pattern | ||
|---|---|---|---|---|---|
| 0x2E000000 | EXT <Vd>.<T>, <Vn>.<T>, <Vm>.<T>, #<index> | A64 | 0 | Q | 101110 | 00 | 0 | Rm | 0 | imm4 | 0 | Rn | Rd | ||
| 0x05600000 | EXT <Zd>.B, { <Zn1>.B, <Zn2>.B }, #<imm> | A64 | 00000101011 | imm8h | 000 | imm8l | Zn | Zd | ||
| 0x05200000 | EXT <Zdn>.B, <Zdn>.B, <Zm>.B, #<imm> | A64 | 00000101001 | imm8h | 000 | imm8l | Zm | Zdn |
Description
Extract vector from pair of vectors. This instruction extracts the lowest vector elements from the second source SIMD&FP register and the highest vector elements from the first source SIMD&FP register, concatenates the results into a vector, and writes the vector to the destination SIMD&FP register vector. The index value specifies the lowest vector element to extract from the first source register, and consecutive elements are extracted from the first, then second, source registers until the destination vector is filled. Depending on the settings in the CPACR_EL1, CPTR_EL2, and CPTR_EL3 registers, and the current Security state and Exception level, an attempt to execute the instruction might be trapped.
Operation
CheckFPAdvSIMDEnabled64(); bits(datasize) hi = V[m, datasize]; bits(datasize) lo = V[n, datasize]; bits(datasize*2) concat = hi:lo; V[d, datasize] = concat<(position+datasize)-1:position>;