ssra

Signed Shift Right and Accumulate

SSRA <Vd>.<T>, <Vn>.<T>, #<shift>

Arithmetic right shift and add to destination.

Details

The Signed Shift Right and Accumulate instruction arithmetic right shift and add to destination.

Pseudocode Operation

// Arithmetic right shift and add to destination

Example

SSRA v0.4s.T, v1.4s.T, #LSL

Encoding

Binary Layout
0
Q
001111
0
imm
0001
01
Rn
Rd
 
Format SIMD Shift Imm
Opcode 0x0F001400
Extension NEON (SIMD)

Operands

  • Vd
    Dest/Acc
  • Vn
    First source SIMD/FP vector register
  • shift
    Imm