hlt

Halting Debug-mode

HLT #<imm>

Enters Halting debug mode.

Details

Halting Debug-mode halts the processor and requests entry into halting debug mode with the given exception number. It generates an exception and is typically used only in debug scenarios. No condition flags are modified. This instruction is privileged and requires AArch64 execution; it transitions to debug state and may not return to normal execution.

Pseudocode Operation

BRK(imm16)

Example

HLT #16

Encoding

Binary Layout

11010100

010

imm16

000

Format Exception

Opcode 0xD4400000

Extension Base

Operands

imm
ID

Reference (Arm A64 ISA)

Instruction Forms

Encoding	Instruction		ISA		Bit pattern
0xD4400000	HLT #<imm>		A64		11010100 \| 010 \| imm16 \| 000 \| 00

Description

Halt instruction. An HLT instruction can generate a Halt Instruction debug event, which causes entry into Debug state. Within a guarded memory region, while PSTATE.BTYPE != 0b00, a HLT instruction that would cause entry into Debug state will not generate a Branch Target Exception and will cause entry into Debug state as normal. For more information, see PSTATE.BTYPE.

Operation

FaultRecord fault = NoFault();
Halt(DebugHalt_HaltInstruction, FALSE, fault);