rmif

Rotate Mask Insert Flags

RMIF <Xn>, #<shift>, #<mask>

Rotates a register and inserts bits into the Process State flags.

Pseudocode Operation

rotated ← ROR(Xn, shift); if mask<3> then N ← rotated<63>; if mask<2> then Z ← (rotated<width-1:0> == 0); if mask<1> then C ← rotated<0>; if mask<0> then V ← rotated<1>;

Example

RMIF x1, #LSL, #mask

Encoding

Binary Layout

1

31

0

30

1

29

11010000

28:21

imm6

20:15

00001

14:10

Rn

9:5

0

4

mask

3:0

 

Format Data Processing

Opcode 0xBA000400

Extension FEAT_FlagM

Operands

• Xn
  First source / base 64-bit integer register
• shift
  Rot
• mask
  Flags

Related

More in FEAT_FlagM

Reference

View in Arm A64 ISA Reference ↗ Arm A64 ISA

Instruction Forms

Encoding	Instruction		ISA		Bit pattern
0xBA000400	RMIF <Xn>, #<shift>, #<mask>		A64		1 | 0 | 1 | 11010000 | imm6 | 00001 | Rn | 0 | mask

Description

Performs a rotation right of a value held in a general purpose register by an immediate value, and then inserts a selection of the bottom four bits of the result of the rotation into the PSTATE flags, under the control of a second immediate mask.

Operation

bits(4) tmp;
bits(64) tmpreg = X[n, 64];
tmp = (tmpreg:tmpreg)<lsb+3:lsb>;
if mask<3> == '1' then PSTATE.N = tmp<3>;
if mask<2> == '1' then PSTATE.Z = tmp<2>;
if mask<1> == '1' then PSTATE.C = tmp<1>;
if mask<0> == '1' then PSTATE.V = tmp<0>;