vcmla

Vector Complex Multiply Accumulate (A32)

VCMLA<c>.I<size> <Qd>, <Qn>, <Qm>, #<rot>

Complex integer multiply-accumulate with rotation.

Details

Vector Complex Multiply-Accumulate performs complex multiplication of two vectors with a specified rotation (0°, 90°, 180°, or 270°) and accumulates the result into the destination register, operating on 32-bit or 64-bit integer elements. This instruction does not affect condition flags. The instruction is A32-only and requires the NEON Complex extension; it generates an Undefined Instruction exception if executed without the extension enabled.

Pseudocode Operation

for i = 0 to (128 / esize) - 1 do
  real_part = Qn[2*i] * Qm[2*i] - Qn[2*i+1] * Qm[2*i+1]
  imag_part = Qn[2*i] * Qm[2*i+1] + Qn[2*i+1] * Qm[2*i]
  (real_part, imag_part) = RotateByRot(real_part, imag_part, rot)
  Qd[2*i] = Qd[2*i] + real_part
  Qd[2*i+1] = Qd[2*i+1] + imag_part

Example

VCMLA.Isize q0, q1, q2, #rot

Encoding

Binary Layout
1111110
rot
D
1
S
Vn
Vd
1
0
0
0
N
1
M
0
Vm
 
Format NEON Complex
Opcode 0xFC200840
Extension NEON (Complex)

Operands

  • Qd
    Destination 128-bit SIMD register
  • Qn
    First source 128-bit SIMD register
  • Qm
    Second source 128-bit SIMD register
  • rot
    Rot

Reference (Arm AArch32 ISA)

Instruction Forms

Encoding Instruction ISA Bit pattern
0xFC200800 VCMLA{<q>}.<dt> <Dd>, <Dn>, <Dm>, #<rotate> A32 1111110 | rot | D | 1 | S | Vn | Vd | 1 | 0 | 0 | 0 | N | 0 | M | 0 | Vm
0xFC200840 VCMLA{<q>}.<dt> <Qd>, <Qn>, <Qm>, #<rotate> A32 1111110 | rot | D | 1 | S | Vn | Vd | 1 | 0 | 0 | 0 | N | 1 | M | 0 | Vm
0xFE000800 VCMLA{<q>}.F16 <Dd>, <Dn>, <Dm>[<index>], #<rotate> A32 11111110 | 0 | D | rot | Vn | Vd | 1000 | N | 0 | M | 0 | Vm
0xFE800800 VCMLA{<q>}.F32 <Dd>, <Dn>, <Dm>[0], #<rotate> A32 11111110 | 1 | D | rot | Vn | Vd | 1000 | N | 0 | M | 0 | Vm
0xFE000840 VCMLA{<q>}.F16 <Qd>, <Qn>, <Dm>[<index>], #<rotate> A32 11111110 | 0 | D | rot | Vn | Vd | 1000 | N | 1 | M | 0 | Vm
0xFE800840 VCMLA{<q>}.F32 <Qd>, <Qn>, <Dm>[0], #<rotate> A32 11111110 | 1 | D | rot | Vn | Vd | 1000 | N | 1 | M | 0 | Vm

Description

Vector Complex Multiply Accumulate. This instruction operates on complex numbers that are represented in SIMD&FP registers as pairs of elements, with the more significant element holding the imaginary part of the number and the less significant element holding the real part of the number. Each element holds a floating-point value. It performs the following computation on the corresponding complex number element pairs from the two source registers and the destination register: The multiplication and addition operations are performed as a fused multiply-add, without any intermediate rounding. Depending on settings in the CPACR, NSACR, and HCPTR registers, and the Security state and PE mode in which the instruction is executed, an attempt to execute the instruction might be undefined, or trapped to Hyp mode. For more information see Enabling Advanced SIMD and floating-point support.

Operation

EncodingSpecificOperations();
CheckAdvSIMDEnabled();
for r = 0 to regs-1
    operand1 = D[n+r];
    operand2 = D[m+r];
    operand3 = D[d+r];
    for e = 0 to (elements DIV 2)-1
        bits(esize) element1;
        bits(esize) element2;
        bits(esize) element3;
        bits(esize) element4;
        case rot of
            when '00'
                element1 = Elem[operand2,e*2,esize];
                element2 = Elem[operand1,e*2,esize];
                element3 = Elem[operand2,e*2+1,esize];
                element4 = Elem[operand1,e*2,esize];
            when '01'
                element1 = FPNeg(Elem[operand2,e*2+1,esize]);
                element2 = Elem[operand1,e*2+1,esize];
                element3 = Elem[operand2,e*2,esize];
                element4 = Elem[operand1,e*2+1,esize];
            when '10'
                element1 = FPNeg(Elem[operand2,e*2,esize]);
                element2 = Elem[operand1,e*2,esize];
                element3 = FPNeg(Elem[operand2,e*2+1,esize]);
                element4 = Elem[operand1,e*2,esize];
            when '11'
                element1 = Elem[operand2,e*2+1,esize];
                element2 = Elem[operand1,e*2+1,esize];
                element3 = FPNeg(Elem[operand2,e*2,esize]);
                element4 = Elem[operand1,e*2+1,esize];
        result1 = FPMulAdd(Elem[operand3,e*2,esize],element2,element1, StandardFPSCRValue());
        result2 = FPMulAdd(Elem[operand3,e*2+1,esize],element4,element3, StandardFPSCRValue());
        Elem[D[d+r],e*2,esize] = result1;
        Elem[D[d+r],e*2+1,esize] = result2;