pssbb
Physical Speculation Barrier
PSSBB
Prevents speculation on physical resources.
Details
Issues a Physical Speculation Barrier to prevent speculation through the barrier on physical resources, typically used to mitigate certain transient execution side-channel attacks. This AArch64-only hint instruction does not modify any condition flags and has no visible register side effects; it may be a no-op on some implementations but carries architectural implications for speculation control. Introduced in ARMv8.5-A.
Pseudocode Operation
SpeculationBarrier(); // Physical speculation barrier; execution continues normally
Example
PSSBB
Encoding
Binary Layout
11010101000000110011
0100
1
00
11111
Operands
Reference (Arm A64 ISA)
Instruction Forms
| Encoding | Instruction | ISA | Bit pattern | ||
|---|---|---|---|---|---|
| 0xD503349F | PSSBB | A64 | 11010101000000110011 | 0100 | 1 | 00 | 11111 |
Description
Physical Speculative Store Bypass Barrier is a memory barrier that prevents speculative loads from bypassing earlier stores to the same physical address under certain conditions. For more information and details of the semantics, see Physical Speculative Store Bypass Barrier (PSSBB).