smmul

Signed Most Significant Word Multiply

SMMUL{R}<c> <Rd>, <Rn>, <Rm>

Multiplies and returns the top 32-bits of the 64-bit result.

Details

The Signed Most Significant Word Multiply instruction multiplies and returns the top 32-bits of the 64-bit result.

Pseudocode Operation

// Multiplies and returns the top 32-bits of the 64-bit result

Example

SMMUL r0, r1, r2

Encoding

Binary Layout
cond
01110101
Rn
Rd
1111
0001
Rm
 
Format Multiply
Opcode 0x0750F010
Extension A32 (DSP)

Operands

  • Rd
    Destination general-purpose register
  • Rn
    First source / base general-purpose register
  • Rm
    Second source / offset general-purpose register