pld

Preload Data

PLD [<Rn>, #<imm>]

Hints memory system to bring data into cache.

Pseudocode Operation

address ← Rn + imm12
// Preload hint sent to memory system; no registers modified

Example

PLD [r1, #16]

Encoding

Binary Layout

1111010

31:25

1

24

U

23

1

22

01

21:20

Rn

19:16

1

15

1

14

1

13

1

12

imm12

11:0

 

Format Load/Store

Opcode 0xF550F000

Extension A32 (System)

Operands

• Rn
  First source / base general-purpose register
• imm
  Signed immediate value

Related

More in A32 (System)

Reference

View in Arm A64 ISA Reference ↗ Arm AArch32 ISA

Instruction Forms

Encoding	Instruction		ISA		Bit pattern
0xF550F000	PLD{<c>}{<q>} [<Rn> {, #{+/-}<imm>}]		A32		1111010 | 1 | U | 1 | 01 | Rn | 1 | 1 | 1 | 1 | imm12
0xF890F000	PLD{<c>}{<q>} [<Rn> {, #{+}<imm>}]		T32		111110001 | 0 | 0 | 1 | Rn | 1111 | imm12
0xF810FC00	PLD{<c>}{<q>} [<Rn> {, #-<imm>}]		T32		111110000 | 0 | 0 | 1 | Rn | 1111 | 1100 | imm8
0xF55FF000	PLD{<c>}{<q>} <label>		A32		1111010 | 1 | U | 1 | 01 | 1111 | 1 | 1 | 1 | 1 | imm12
0xF81FF000	PLD{<c>}{<q>} <label>		T32		11111000 | U | 0 | 0 | 1 | 1111 | 1111 | imm12
0xF750F000	PLD{<c>}{<q>} [<Rn>, {+/-}<Rm> {, <shift> #<amount>}]		A32		1111011 | 1 | U | 1 | 01 | Rn | 1 | 1 | 1 | 1 | imm5 | stype | 0 | Rm
0xF750F060	PLD{<c>}{<q>} [<Rn>, {+/-}<Rm> , RRX]		A32		1111011 | 1 | U | 1 | 01 | Rn | 1 | 1 | 1 | 1 | 00000 | 11 | 0 | Rm
0xF810F000	PLD{<c>}{<q>} [<Rn>, {+}<Rm> {, LSL #<amount>}]		T32		111110000 | 0 | 0 | 1 | Rn | 1111 | 000000 | imm2 | Rm

Description

Preload Data (immediate) signals the memory system that data memory accesses from a specified address are likely in the near future. The memory system can respond by taking actions that are expected to speed up the memory accesses when they do occur, such as preloading the cache line containing the specified address into the data cache. The PLD instruction signals that the likely memory access is a read, and the PLDW instruction signals that it is a write. The effect of a PLD or PLDW instruction is implementation defined. For more information, see Preloading caches.

Operation

if ConditionPassed() then
    EncodingSpecificOperations();
    address = if add then (R[n] + imm32) else (R[n] - imm32);
    if is_pldw then
        Hint_PreloadDataForWrite(address);
    else
        Hint_PreloadData(address);