rev

Reverse Bytes (64-bit)

REV <Xd>, <Xn>

Reverses byte order in a 64-bit register.

Pseudocode Operation

Xd[63:56] ← Xn[7:0]
Xd[55:48] ← Xn[15:8]
Xd[47:40] ← Xn[23:16]
Xd[39:32] ← Xn[31:24]
Xd[31:24] ← Xn[39:32]
Xd[23:16] ← Xn[47:40]
Xd[15:8] ← Xn[55:48]
Xd[7:0] ← Xn[63:56]

Example

REV x0, x1

Encoding

Binary Layout

11010110

28:21

00000

20:16

0000

15:12

11:10

9:5

4:0

Format Data Processing

Opcode 0xDAC00C00

Extension Base

Operands

Xd
Destination 64-bit integer register
Xn
First source / base 64-bit integer register

Other forms of rev

rev SVE Reverse Vector, SVE
rev Reverse Bytes (Thumb), T32 (Thumb)
rev Reverse Bytes (Thumb), A32 (Base)
rev Reverse Bytes (32-bit), Base
rev Reverse Bytes (A32), A32 (Base)

Across architectures

Byte Swap (Endianness Reversal) : how x86, ARM, RISC-V, and PowerISA each do this.

Reference

View in Arm A64 ISA Reference ↗ Arm A64 ISA

Instruction Forms

Encoding	Instruction	ISA	Bit pattern
0x5AC00800	REV <Wd>, <Wn>	A64	0 \| 1 \| 0 \| 11010110 \| 00000 \| 0000 \| 10 \| Rn \| Rd
0xDAC00C00	REV <Xd>, <Xn>	A64	1 \| 1 \| 0 \| 11010110 \| 00000 \| 0000 \| 11 \| Rn \| Rd
0x05344000	REV <Pd>.<T>, <Pn>.<T>	A64	00000101 \| size \| 110100010000 \| 0 \| Pn \| 0 \| Pd
0x05383800	REV <Zd>.<T>, <Zn>.<T>	A64	00000101 \| size \| 111000001110 \| Zn \| Zd

Description

Reverse Bytes reverses the byte order in a register.

Operation

bits(datasize) operand = X[n, datasize];
bits(datasize) result;

constant integer containers = datasize DIV container_size;
for c = 0 to containers-1
    bits(container_size) container = Elem[operand, c, container_size];
    Elem[result, c, container_size] = Reverse(container, 8);

X[d, datasize] = result;

rev