qadd8
Saturating Add 8
QADD8<c> <Rd>, <Rn>, <Rm>
Parallel saturating add of 4 signed bytes.
Details
Performs four parallel saturating additions on signed bytes: each byte of Rn is added to the corresponding byte of Rm with signed saturation, and the four 8-bit saturated results are packed into Rd. The GE[3:0] condition flags are updated to indicate which byte operations did not saturate. A32 DSP extension only.
Pseudocode Operation
for i = 0 to 3
byte_index ← i × 8
a ← SignExtend(Rn[byte_index + 7 : byte_index], 9)
b ← SignExtend(Rm[byte_index + 7 : byte_index], 9)
sum ← a + b
if sum > 127 then
result_byte ← 127
GE[i] ← 0
elsif sum < -128 then
result_byte ← -128
GE[i] ← 0
else
result_byte ← sum[7:0]
GE[i] ← 1
Rd[byte_index + 7 : byte_index] ← result_byteExample
QADD8 r0, r1, r2
Encoding
Binary Layout
cond
01100
010
Rn
Rd
1
1
1
1
1
00
1
Rm
Operands
-
Rd
Destination general-purpose register -
Rn
First source / base general-purpose register -
Rm
Second source / offset general-purpose register
Reference (Arm AArch32 ISA)
Instruction Forms
| Encoding | Instruction | ISA | Bit pattern | ||
|---|---|---|---|---|---|
| 0x06200F90 | QADD8{<c>}{<q>} {<Rd>,} <Rn>, <Rm> | A32 | cond | 01100 | 010 | Rn | Rd | 1 | 1 | 1 | 1 | 1 | 00 | 1 | Rm | ||
| 0xFA80F010 | QADD8{<c>}{<q>} {<Rd>,} <Rn>, <Rm> | T32 | 111110101 | 000 | Rn | 1111 | Rd | 0 | 0 | 0 | 1 | Rm |
Description
Saturating Add 8 performs four 8-bit integer additions, saturates the results to the 8-bit signed integer range -27 <= x <= 27 - 1, and writes the results to the destination register.
Operation
if ConditionPassed() then
EncodingSpecificOperations();
sum1 = SInt(R[n]<7:0>) + SInt(R[m]<7:0>);
sum2 = SInt(R[n]<15:8>) + SInt(R[m]<15:8>);
sum3 = SInt(R[n]<23:16>) + SInt(R[m]<23:16>);
sum4 = SInt(R[n]<31:24>) + SInt(R[m]<31:24>);
R[d]<7:0> = SignedSat(sum1, 8);
R[d]<15:8> = SignedSat(sum2, 8);
R[d]<23:16> = SignedSat(sum3, 8);
R[d]<31:24> = SignedSat(sum4, 8);