bfm

Bitfield Move

BFM <Wd>, <Wn>, #<immr>, #<imms>

Moves a bitfield from source to destination.

Pseudocode Operation

width ← imms - immr + 1
if width < 0 then width ← width + 64
lsb ← imms - width + 1
src_bits ← (Wn >> immr) & ((1 << width) - 1)
dst_mask ← ((1 << width) - 1) << lsb
Wd ← (Wd & ~dst_mask) | (src_bits << lsb)

Example

BFM w0, w1, #immr, #imms

Encoding

Binary Layout

30:29

100110

28:23

immr

21:16

imms

15:10

9:5

4:0

Format Bitfield

Opcode 0x33000000

Extension Base

Operands

Wd
Destination 32-bit integer register
Wn
First source / base 32-bit integer register
immr
Rotate
imms
Size

Other forms of bfm

bfm Bitfield Move (64-bit)

Reference

View in Arm A64 ISA Reference ↗ Arm A64 ISA

Instruction Forms

Encoding	Instruction		ISA		Bit pattern
0x33000000	BFM <Wd>, <Wn>, #<immr>, #<imms>		A64		0 \| 01 \| 100110 \| 0 \| immr \| imms \| Rn \| Rd
0xB3400000	BFM <Xd>, <Xn>, #<immr>, #<imms>		A64		1 \| 01 \| 100110 \| 1 \| immr \| imms \| Rn \| Rd

Description

Bitfield Move is usually accessed via one of its aliases, which are always preferred for disassembly. If <imms> is greater than or equal to <immr>, this copies a bitfield of (<imms>-<immr>+1) bits starting from bit position <immr> in the source register to the least significant bits of the destination register. If <imms> is less than <immr>, this copies a bitfield of (<imms>+1) bits from the least significant bits of the source register to bit position (regsize-<immr>) of the destination register, where regsize is the destination register size of 32 or 64 bits. In both cases the other bits of the destination register remain unchanged.

Operation

bits(datasize) dst = X[d, datasize];
bits(datasize) src = X[n, datasize];

// perform bitfield move on low bits
bits(datasize) bot = (dst AND NOT(wmask)) OR (ROR(src, r) AND wmask);


// combine extension bits and result bits
X[d, datasize] = (dst AND NOT(tmask)) OR (bot AND tmask);

bfm