bic

Bitwise Bit Clear (Shifted Register)

BIC <Wd>, <Wn>, <Wm> {, <shift> #<amount>}

ANDs register with NOT of shifted register (AND NOT).

Details

The Bitwise Bit Clear instruction aNDs register with NOT of shifted register (AND NOT).

Pseudocode Operation

Wd ← Wn AND NOT Wm

Example

BIC w0, w1, w2

Encoding

Binary Layout
00001010
01
Rm
imm6
Rn
Rd
 
Format Logical (Register)
Opcode 0x0A200000
Extension Base

Operands

  • Wd
    Destination 32-bit integer register
  • Wn
    First source / base 32-bit integer register
  • Wm
    Second source / offset 32-bit integer register