isb
Instruction Synchronization Barrier
ISB {<option>}
Flushes the pipeline and prefetches.
Pseudocode Operation
Instruction pipeline ← flushed; Prefetched instructions ← discarded
Example
ISB
Reference
View in Arm A64 ISA Reference ↗
Arm A64 ISA
Instruction Forms
| Encoding | Instruction | ISA | Bit pattern | ||
|---|---|---|---|---|---|
| 0xD50330DF | ISB {<option>|#<imm>} | A64 | 11010101000000110011 | CRm | 1 | 10 | 11111 |
Description
Instruction Synchronization Barrier flushes the pipeline in the PE and is a context synchronization event. For more information, see Instruction Synchronization Barrier (ISB).
Operation
InstructionSynchronizationBarrier();
if IsFeatureImplemented(FEAT_BRBE) && BRBEBranchOnISB() then
BRBEISB();