stc2

Store Coprocessor 2 (A32)

STC2{L}<c> <coproc>, <CRd>, [<Rn>, #+/-<imm>]{!}

Stores coprocessor contents to memory (Extension encoding).

Details

Stores coprocessor data to memory using an extension encoding (STC2 variant). The instruction computes an address from base register Rn and an offset (imm8 scaled by 4), and writes coprocessor register CRd to that memory location. The P, U, N, W bits control pre/post-indexing, up/down offset direction, narrow/wide transfer, and write-back. Condition flags are not affected.

Pseudocode Operation

if ConditionPassed() then
  address ← ComputeAddress(Rn, imm8, P, U, W)
  memory[address] ← CP[coproc, CRd]
  if W == 1 then Rn ← address

Example

STC2 p15, c0, [r1, #+/-#16]!

Encoding

Binary Layout
1111110
P
U
N
W
0
Rn
CRd
coproc
imm8
 
Format Coprocessor
Opcode 0xFD000000
Extension A32 (System)

Operands

  • coproc
    CP Num
  • CRd
    Destination coprocessor register
  • Rn
    First source / base general-purpose register