smaddl

Signed Multiply-Add Long

SMADDL <Xd>, <Wn>, <Wm>, <Xa>

Multiplies two 32-bit registers, adds to 64-bit register (64-bit result).

Pseudocode Operation

product ← SignExtend(Wn, 64) * SignExtend(Wm, 64)
Xd ← product + Xa
N ← unchanged
Z ← unchanged
C ← unchanged
V ← unchanged

Example

SMADDL x0, w1, w2, x5

Encoding

Binary Layout

1

31

00

30:29

11011

28:24

0

23

01

22:21

Rm

20:16

0

15

Ra

14:10

Rn

9:5

Rd

4:0

 

Format Data Processing

Opcode 0x9B200000

Extension Base

Operands

• Xd
  Destination 64-bit integer register
• Wn
  First source / base 32-bit integer register
• Wm
  Second source / offset 32-bit integer register
• Xa
  Addend

Related

More in Base

Reference

View in Arm A64 ISA Reference ↗ Arm A64 ISA

Instruction Forms

Encoding	Instruction		ISA		Bit pattern
0x9B200000	SMADDL <Xd>, <Wn>, <Wm>, <Xa>		A64		1 | 00 | 11011 | 0 | 01 | Rm | 0 | Ra | Rn | Rd

Description

Signed Multiply-Add Long multiplies two 32-bit register values, adds a 64-bit register value, and writes the result to the 64-bit destination register.

Operation

bits(32) operand1 = X[n, 32];
bits(32) operand2 = X[m, 32];
bits(64) operand3 = X[a, 64];

integer result;

result = Int(operand3, FALSE) + (Int(operand1, FALSE) * Int(operand2, FALSE));

X[d, 64] = result<63:0>;