qsub8

Saturating Subtract 8

QSUB8<c> <Rd>, <Rn>, <Rm>

Parallel saturating subtract of 4 signed bytes.

Details

Performs parallel saturating subtraction of four signed 8-bit bytes in Rm from Rn, storing results in Rd. Each byte is independently saturated to the signed 8-bit range [−128, 127] if underflow occurs. No condition flags are affected. Execution restricted to A32 with DSP extension; requires ARMv6 or later.

Pseudocode Operation

Rd[31:24] ← SignedSat(Rn[31:24] − Rm[31:24], 8)
Rd[23:16] ← SignedSat(Rn[23:16] − Rm[23:16], 8)
Rd[15:8] ← SignedSat(Rn[15:8] − Rm[15:8], 8)
Rd[7:0] ← SignedSat(Rn[7:0] − Rm[7:0], 8)

Example

QSUB8 r0, r1, r2

Encoding

Binary Layout
cond
01100
010
Rn
Rd
1
1
1
1
1
11
1
Rm
 
Format SIMD Integer
Opcode 0x06200FF0
Extension A32 (DSP)

Operands

  • Rd
    Destination general-purpose register
  • Rn
    First source / base general-purpose register
  • Rm
    Second source / offset general-purpose register

Reference (Arm AArch32 ISA)

Instruction Forms

Encoding Instruction ISA Bit pattern
0x06200FF0 QSUB8{<c>}{<q>} {<Rd>,} <Rn>, <Rm> A32 cond | 01100 | 010 | Rn | Rd | 1 | 1 | 1 | 1 | 1 | 11 | 1 | Rm
0xFAC0F010 QSUB8{<c>}{<q>} {<Rd>,} <Rn>, <Rm> T32 111110101 | 100 | Rn | 1111 | Rd | 0 | 0 | 0 | 1 | Rm

Description

Saturating Subtract 8 performs four 8-bit integer subtractions, saturates the results to the 8-bit signed integer range -27 <= x <= 27 - 1, and writes the results to the destination register.

Operation

if ConditionPassed() then
    EncodingSpecificOperations();
    diff1 = SInt(R[n]<7:0>) - SInt(R[m]<7:0>);
    diff2 = SInt(R[n]<15:8>) - SInt(R[m]<15:8>);
    diff3 = SInt(R[n]<23:16>) - SInt(R[m]<23:16>);
    diff4 = SInt(R[n]<31:24>) - SInt(R[m]<31:24>);
    R[d]<7:0>   = SignedSat(diff1, 8);
    R[d]<15:8>  = SignedSat(diff2, 8);
    R[d]<23:16> = SignedSat(diff3, 8);
    R[d]<31:24> = SignedSat(diff4, 8);