fadd

Vector Floating-Point Add

FADD <Vd>.<T>, <Vn>.<T>, <Vm>.<T>

Adds elements of two floating-point vectors.

Details

The Vector Floating-Point Add instruction adds elements of two floating-point vectors.

Pseudocode Operation

Vd ← Vn + Vm
// Flags affected: N, Z, C, V

Example

FADD v0.4s.T, v1.4s.T, v2.4s.T

Encoding

Binary Layout
0
Q
001110
0
sz
1
Rm
1101
0
Rn
Rd
 
Format SIMD Three Register
Opcode 0x0E20D400
Extension NEON (SIMD)

Operands

  • Vd
    Destination SIMD/FP vector register
  • Vn
    First source SIMD/FP vector register
  • Vm
    Second source SIMD/FP vector register