stlr

Store-Release Register

STLR <Wt>, [<Xn|SP>]

Stores a word with Release semantics.

Details

Stores the 32-bit value in Wt to memory at the address specified by Xn (or SP), with Release semantics for synchronization. The Release semantics ensure that all memory operations before this instruction are visible to observers before the store completes. No condition flags are affected. This instruction is AArch64-only and requires the Load-Acquire/Store-Release extension.

Pseudocode Operation

address ← Xn
MemoryOrder(Release)
[address] ← Wt[31:0]

Example

STLR w3, [x1]

Encoding

Binary Layout
10
0010001
0
0
11111
1
11111
Rn
Rt
 
Format Load/Store
Opcode 0x889FFC00
Extension Base (Atomic)

Operands

  • Wt
    Transfer 32-bit integer register (load/store)
  • Xn
    First source / base 64-bit integer register

Reference (Arm A64 ISA)

Instruction Forms

Encoding Instruction ISA Bit pattern
0x889FFC00 STLR <Wt>, [<Xn|SP>{, #0}] A64 10 | 0010001 | 0 | 0 | 11111 | 1 | 11111 | Rn | Rt
0xC89FFC00 STLR <Xt>, [<Xn|SP>{, #0}] A64 11 | 0010001 | 0 | 0 | 11111 | 1 | 11111 | Rn | Rt
0x99800800 STLR <Wt>, [<Xn|SP>, #-4]! A64 10 | 0110011 | 0 | 000000000010 | Rn | Rt
0xD9800800 STLR <Xt>, [<Xn|SP>, #-8]! A64 11 | 0110011 | 0 | 000000000010 | Rn | Rt

Description

Store-Release Register stores a 32-bit word or a 64-bit doubleword to a memory location, from a register. The instruction also has memory ordering semantics as described in Load-Acquire, Store-Release. For information about memory accesses, see Load/Store addressing modes.

Operation

bits(64) address;
bits(datasize) data;
constant integer dbytes = datasize DIV 8;

AccessDescriptor accdesc;
accdesc = CreateAccDescAcqRel(MemOp_STORE, tagchecked);

if n == 31 then
    CheckSPAlignment();
    address = SP[];
else
    address = X[n, 64];

address = GenerateAddress(address, offset, accdesc);
if rt_unknown then
    data = bits(datasize) UNKNOWN;
else
    data = X[t, datasize];
Mem[address, dbytes, accdesc] = data;

if wback then
    if n == 31 then
        SP[] = address;
    else
        X[n, 64] = address;