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Branch with Link to Register

BLR <Xn>

Indirect function call. Branches to address in Xn and stores return in LR.

Details

Branch with link to register: indirect branch to the address held in Xn and stores the return address (current PC + 4) in the link register X30 (LR). No condition flags are affected. This is an AArch64-only instruction.

Pseudocode Operation

LR ← PC + 4
PC ← Xn

Example

BLR x1

Encoding

Binary Layout
1101011
0
0
01
11111
0000
0
0
Rn
00000
 
Format Branch (Reg)
Opcode 0xD63F0000
Extension Base

Operands

  • Xn
    Target Address

Reference (Arm A64 ISA)

Instruction Forms

Encoding Instruction ISA Bit pattern
0xD63F0000 BLR <Xn> A64 1101011 | 0 | 0 | 01 | 11111 | 0000 | 0 | 0 | Rn | 00000

Description

Branch with Link to Register calls a subroutine at an address in a register, setting register X30 to PC+4.

Operation

bits(64) target = X[n, 64];

if IsFeatureImplemented(FEAT_GCS) && GCSPCREnabled(PSTATE.EL) then
    AddGCSRecord(PC64 + 4);
X[30, 64] = PC64 + 4;

// Value in BTypeNext will be used to set PSTATE.BTYPE
BTypeNext = '10';
BranchTo(target, BranchType_INDCALL, FALSE);