ands

Bitwise AND and Set Flags (Immediate 64-bit)

ANDS <Xd>, <Xn>, #<imm>

Bitwise AND immediate, updates flags (64-bit).

Details

Performs a bitwise AND between Xn and a 64-bit immediate value, storing the result in Xd and updating the condition flags. Sets the Z flag if the result is zero, the N flag based on bit 63 of the result, and clears the C and V flags.

Pseudocode Operation

result ← Xn AND imm
Xd ← result
N ← result[63]
Z ← (result == 0)
C ← 0
V ← 0

Example

ANDS x0, x1, #16

Encoding

Binary Layout
1
11
100100
N
immr
imms
Rn
Rd
 
Format Logical (Immediate)
Opcode 0xF2000000
Extension Base

Operands

  • Xd
    Destination 64-bit integer register
  • Xn
    First source / base 64-bit integer register
  • imm
    Imm

Reference (Arm A64 ISA)

Instruction Forms

Encoding Instruction ISA Bit pattern
0x72000000 ANDS <Wd>, <Wn>, #<imm> A64 0 | 11 | 100100 | 0 | immr | imms | Rn | Rd
0xF2000000 ANDS <Xd>, <Xn>, #<imm> A64 1 | 11 | 100100 | N | immr | imms | Rn | Rd
0x6A000000 ANDS <Wd>, <Wn>, <Wm>{, <shift> #<amount>} A64 0 | 11 | 01010 | shift | 0 | Rm | imm6 | Rn | Rd
0xEA000000 ANDS <Xd>, <Xn>, <Xm>{, <shift> #<amount>} A64 1 | 11 | 01010 | shift | 0 | Rm | imm6 | Rn | Rd
0x25404000 ANDS <Pd>.B, <Pg>/Z, <Pn>.B, <Pm>.B A64 00100101 | 0 | 1 | 00 | Pm | 01 | Pg | 0 | Pn | 0 | Pd

Description

Bitwise AND (immediate), setting flags, performs a bitwise AND of a register value and an immediate value, and writes the result to the destination register. It updates the condition flags based on the result.

Operation

bits(datasize) result;
bits(datasize) operand1 = X[n, datasize];

result = operand1 AND imm;
PSTATE.<N,Z,C,V> = result<datasize-1>:IsZeroBit(result):'00';

X[d, datasize] = result;