cinv

Conditional Invert

CINV <Wd>, <Wn>, <cond>

Invert register bits if condition is true, else copy. (Alias for CSINV)

Details

Conditionally inverts all bits in the source register and writes the result to the destination, or copies the source unchanged based on the condition code. This is an alias for CSINV (Conditional Select Invert). Condition flags are not affected by this instruction. Executes in AArch64 state only.

Pseudocode Operation

if ConditionHolds(cond) then
  Wd ← ~Wn
else
  Wd ← Wn

Example

CINV w0, w1, cond

Encoding

Binary Layout
0
1
0
11010100
Rm
cond
0
0
Rn
Rd
 
Format Cond Select
Opcode 0x5A800000
Extension Base

Operands

  • Wd
    Destination 32-bit integer register
  • Wn
    First source / base 32-bit integer register
  • cond
    Condition

Reference (Arm A64 ISA)

Instruction Forms

Encoding Instruction ISA Bit pattern
0x5A800000 CINV <Wd>, <Wn>, <invcond> A64 0 | 1 | 0 | 11010100 | Rm | cond | 0 | 0 | Rn | Rd
0xDA800000 CINV <Xd>, <Xn>, <invcond> A64 1 | 1 | 0 | 11010100 | Rm | cond | 0 | 0 | Rn | Rd

Description

Conditional Invert returns, in the destination register, the bitwise inversion of the value of the source register if the condition is TRUE, and otherwise returns the value of the source register.