cnt

Vector Population Count

CNT <Vd>.<T>, <Vn>.<T>

Counts set bits (population count) per byte.

Details

Counts the number of set bits (population count) in each byte element of the source vector and places the result in the corresponding byte of the destination vector. This is a per-byte operation with no flag effects. The instruction is available in AArch64 NEON and operates on both 64-bit (Q=0) and 128-bit (Q=1) vectors.

Pseudocode Operation

for i = 0 to elements_in_vector - 1:
  Vd[i] ← PopulationCount(Vn[i])

Example

CNT v0.4s.T, v1.4s.T

Encoding

Binary Layout
0
Q
0
01110
size
10000
00101
10
Rn
Rd
 
Format SIMD Two Register
Opcode 0x0E205800
Extension NEON (SIMD)

Operands

  • Vd
    Destination SIMD/FP vector register
  • Vn
    First source SIMD/FP vector register

Reference (Arm A64 ISA)

Instruction Forms

Encoding Instruction ISA Bit pattern
0x5AC01C00 CNT <Wd>, <Wn> A64 0 | 1 | 0 | 11010110 | 00000 | 000111 | Rn | Rd
0xDAC01C00 CNT <Xd>, <Xn> A64 1 | 1 | 0 | 11010110 | 00000 | 000111 | Rn | Rd
0x0E205800 CNT <Vd>.<T>, <Vn>.<T> A64 0 | Q | 0 | 01110 | size | 10000 | 00101 | 10 | Rn | Rd
0x041AA000 CNT <Zd>.<T>, <Pg>/M, <Zn>.<T> A64 00000100 | size | 011 | 01 | 0 | 101 | Pg | Zn | Zd

Description

Population Count per byte. This instruction counts the number of bits that have a value of one in each vector element in the source SIMD&FP register, places the result into a vector, and writes the vector to the destination SIMD&FP register. Depending on the settings in the CPACR_EL1, CPTR_EL2, and CPTR_EL3 registers, and the current Security state and Exception level, an attempt to execute the instruction might be trapped.

Operation

CheckFPAdvSIMDEnabled64();
bits(datasize) operand = V[n, datasize];
bits(datasize) result;

integer count;
for e = 0 to elements-1
    count = BitCount(Elem[operand, e, esize]);
    Elem[result, e, esize] = count<esize-1:0>;
V[d, datasize] = result;