vabal

Vector Absolute Difference and Accumulate Long

VABAL<c>.<dt> <Qd>, <Dn>, <Dm>

Computes absolute difference of narrow elements and adds to wide acc.

Details

Computes the absolute difference of narrow elements from two double-width registers and accumulates (adds) the widened result to a quad-width accumulator register. The operand size is determined by the data type specifier (sz field controls .I8, .I16, or .I32 variants). No condition flags are affected; saturation may occur and set the QC flag if enabled.

Pseudocode Operation

for i = 0 to (64 / esize - 1)
  diff ← abs(Dn[i] - Dm[i])
  Qd[i] ← Qd[i] + diff_widened

Example

VABAL.dt q0, d1, d2

Encoding

Binary Layout
1111001
U
1
D
size
Vn
Vd
0101
N
0
M
0
Vm
 
Format NEON 3-Reg
Opcode 0xF2800500
Extension NEON (SIMD)

Operands

  • Qd
    Dest Wide
  • Dn
    First source 64-bit SIMD/FP register
  • Dm
    Second source 64-bit SIMD/FP register

Reference (Arm AArch32 ISA)

Instruction Forms

Encoding Instruction ISA Bit pattern
0xF2800500 VABAL{<c>}{<q>}.<dt> <Qd>, <Dn>, <Dm> A32 1111001 | U | 1 | D | size | Vn | Vd | 0101 | N | 0 | M | 0 | Vm
0xEF800500 VABAL{<c>}{<q>}.<dt> <Qd>, <Dn>, <Dm> T32 111 | U | 11111 | D | size | Vn | Vd | 0101 | N | 0 | M | 0 | Vm

Description

Vector Absolute Difference and Accumulate Long subtracts the elements of one vector from the corresponding elements of another vector, and accumulates the absolute values of the results into the elements of the destination vector. Operand elements are all integers of the same length, and the result elements are double the length of the operands. Depending on settings in the CPACR, NSACR, and HCPTR registers, and the Security state and PE mode in which the instruction is executed, an attempt to execute the instruction might be undefined, or trapped to Hyp mode. For more information see Enabling Advanced SIMD and floating-point support.

Operation

if ConditionPassed() then
    EncodingSpecificOperations();  CheckAdvSIMDEnabled();
    for r = 0 to regs-1
        for e = 0 to elements-1
            op1 = Elem[Din[n+r],e,esize];
            op2 = Elem[Din[m+r],e,esize];
            absdiff = Abs(Int(op1,unsigned) - Int(op2,unsigned));
            if long_destination then
                Elem[Q[d>>1],e,2*esize] = Elem[Qin[d>>1],e,2*esize] + absdiff;
            else
                Elem[D[d+r],e,esize] = Elem[Din[d+r],e,esize] + absdiff;