fminv
Floating-Point Minimum Reduction (NEON)
FMINV <Sd>, <Vn>.<T>
Details
The Floating-Point Minimum Reduction instruction finds min float in a vector.
Pseudocode Operation
Sd ← Vn ? SRC2
Example
FMINV s0, v1.4s.T
Encoding
Binary Layout
01101110
10110000
111110
Rn
Rd
Operands
-
Sd
Destination 32-bit floating-point register -
Vn
First source SIMD/FP vector register