dcps3
Debug Change PE State to EL3 (A32)
DCPS3
Switches execution to EL3 (Debug).
Pseudocode Operation
CurrentEL ← EL3; PSTATE.EL ← '11'; PSTATE.SS ← '0';
Encoding
Binary Layout
111101111000
31:20
1111
19:16
1000
15:12
0000000000
11:2
11
1:0
Operands
Reference
View in Arm A64 ISA Reference ↗
Arm AArch32 ISA
Instruction Forms
| Encoding | Instruction | ISA | Bit pattern | ||
|---|---|---|---|---|---|
| 0xF78F8003 | DCPS3 | T32 | 111101111000 | 1111 | 1000 | 0000000000 | 11 |
Description
Debug Change PE State to EL3 allows the debugger to move the PE into EL3 from a lower Exception level or to a specific mode at the current Exception level. DCPS3 is undefined if any of: When the PE executes DCPS3: For more information on the operation of the DCPS<n> instructions, see DCPS.
Operation
if !Halted() || EDSCR.SDD == '1' then UNDEFINED;
if ELUsingAArch32(EL3) then
from_secure = CurrentSecurityState() == SS_Secure;
if PSTATE.M == M32_Monitor then SCR.NS = '0';
AArch32.WriteMode(M32_Monitor);
if HavePANExt() then
if !from_secure then
PSTATE.PAN = '0';
elsif SCTLR.SPAN == '0' then
PSTATE.PAN = '1';
PSTATE.E = SCTLR.EE;
LR_mon = bits(32) UNKNOWN;
SPSR_mon = bits(32) UNKNOWN;
DLR = bits(32) UNKNOWN;
DSPSR = bits(32) UNKNOWN;
else // Targeting EL3 using AArch64
AArch64.MaybeZeroRegisterUppers();
MaybeZeroSVEUppers(EL3);
PSTATE.nRW = '0';
PSTATE.SP = '1';
PSTATE.EL = EL3;
if HaveUAOExt() then PSTATE.UAO = '0';
ELR_EL3 = bits(64) UNKNOWN;
ESR_EL3 = bits(64) UNKNOWN;
SPSR_EL3 = bits(64) UNKNOWN;
DLR_EL0 = bits(64) UNKNOWN;
DSPSR_EL0 = bits(64) UNKNOWN;
sync_errors = HaveIESB() && SCTLR_EL3.IESB == '1';
if HaveDoubleFaultExt() && EffectiveEA() == '1' && SCR_EL3.NMEA == '1' then
sync_errors = TRUE;
// SCTLR_EL3.IESB might be ignored in Debug state.
if !ConstrainUnpredictableBool(Unpredictable_IESBinDebug) then
sync_errors = FALSE;
if sync_errors then SynchronizeErrors();
UpdateEDSCRFields(); // Update EDSCR PE state flags