ic

Instruction Cache Operation

IC <op> {, <Xt>}

Performs instruction cache maintenance.

Pseudocode Operation

ICacheMaintenance(op, address ← Xt); // Operation type determined by op, affecting IC_IALLU, IC_IVAU, IC_IALLUIS

Example

IC op

Encoding

Binary Layout

1101010100

31:22

0

21

01

20:19

op1

18:16

0111

15:12

CRm

11:8

op2

7:5

Rt

4:0

 

Format System Alias

Opcode 0xD5087000

Extension System

Operands

• op
  Operation (IALLU, IVAU)
• Xt
  Address (Optional)

Related

More in System

Reference

View in Arm A64 ISA Reference ↗ Arm A64 ISA

Instruction Forms

Encoding	Instruction		ISA		Bit pattern
0xD5087000	IC <ic_op>{, <Xt>}		A64		1101010100 | 0 | 01 | op1 | 0111 | CRm | op2 | Rt

Description

Instruction Cache operation. For more information, see op0==0b01, cache maintenance, TLB maintenance, and address translation instructions.