msrr

Move Two Registers to System Register (128-bit)

MSRR <sysreg>, <Xt>, <Xt+1>

Writes two general-purpose registers into a 128-bit system register.

Pseudocode Operation

SYSREG[sysreg][63:0] ← Xt
SYSREG[sysreg][127:64] ← Xt+1

Example

MSRR sysreg, x3, Xt+1

Encoding

Binary Layout

1101010101

31:22

op1

18:16

CRn

15:12

CRm

11:8

op2

7:5

4:0

Format System

Opcode 0xD5500000

Extension FEAT_SYSREG128

Operands

sysreg
Reg
Xt
Lo
Xt+1
Hi

Reference

View in Arm A64 ISA Reference ↗ Arm A64 ISA

Instruction Forms

Encoding	Instruction		ISA		Bit pattern
0xD5500000	MSRR (<systemreg>\|S<op0>_<op1>_<Cn>_<Cm>_<op2>), <Xt>, <Xt+1>		A64		1101010101 \| 0 \| 1 \| o0 \| op1 \| CRn \| CRm \| op2 \| Rt

Description

Move two adjacent general-purpose registers to System Register allows the PE to write an AArch64 128-bit System register from two adjacent 64-bit general-purpose registers.

Operation

AArch64.SysRegWrite128(sys_op0, sys_op1, sys_crn, sys_crm, sys_op2, t, t2);