rsc
Reverse Subtract with Carry (A32)
RSC{S}<c> <Rd>, <Rn>, <Operand2>
Calculates Rd = Operand2 - Rn - NOT(Carry).
Pseudocode Operation
result ← Operand2 - Rn - NOT(C)
Rd ← result
if S == 1 then
N ← result[31]
Z ← (result == 0)
C ← NOT(Borrow)
V ← (Operand2[31] != Rn[31]) AND (Operand2[31] != result[31])
endif
Example
RSC r0, r1, r2
Encoding
Binary Layout
cond
31:28
0010
27:24
111
23:21
0
20
Rn
19:16
Rd
15:12
imm12
11:0
Operands
-
Rd
Destination general-purpose register -
Rn
First source / base general-purpose register -
Operand2
Flexible second operand (register or shifted register)
Related
More in A32 (Base)
Reference
View in Arm A64 ISA Reference ↗
Arm AArch32 ISA
Instruction Forms
| Encoding | Instruction | ISA | Bit pattern | ||
|---|---|---|---|---|---|
| 0x02E00000 | RSC{<c>}{<q>} {<Rd>,} <Rn>, #<const> | A32 | cond | 0010 | 111 | 0 | Rn | Rd | imm12 | ||
| 0x00E00060 | RSC{<c>}{<q>} {<Rd>,} <Rn>, <Rm>, RRX | A32 | cond | 0000 | 111 | 0 | Rn | Rd | 00000 | 11 | 0 | Rm | ||
| 0x00E00000 | RSC{<c>}{<q>} {<Rd>,} <Rn>, <Rm> {, <shift> #<amount>} | A32 | cond | 0000 | 111 | 0 | Rn | Rd | imm5 | stype | 0 | Rm | ||
| 0x00E00010 | RSC{<c>}{<q>} {<Rd>,} <Rn>, <Rm>, <shift> <Rs> | A32 | cond | 0000 | 111 | 0 | Rn | Rd | Rs | 0 | stype | 1 | Rm |
Description
Reverse Subtract with Carry (immediate) subtracts a register value and the value of NOT (Carry flag) from an immediate value, and writes the result to the destination register. If the destination register is not the PC, the RSCS variant of the instruction updates the condition flags based on the result. The field descriptions for <Rd> identify the encodings where the PC is permitted as the destination register. ARM deprecates any use of these encodings. However, when the destination register is the PC:
Operation
if ConditionPassed() then
EncodingSpecificOperations();
(result, nzcv) = AddWithCarry(NOT(R[n]), imm32, PSTATE.C);
if d == 15 then
if setflags then
ALUExceptionReturn(result);
else
ALUWritePC(result);
else
R[d] = result;
if setflags then
PSTATE.<N,Z,C,V> = nzcv;