setp
Memory Set (Prologue)
Memory Set Prologue.
Pseudocode Operation
No pseudocode available.
Encoding
Related
More in FEAT_MOPS
Reference
Instruction Forms
| Encoding | Instruction | ISA | Bit pattern | ||
|---|---|---|---|---|---|
| 0x19C00400 | SETP [<Xd>]!, <Xn>!, <Xs> | A64 | sz | 011 | 0 | 01 | 11 | 0 | Rs | 0000 | 01 | Rn | Rd |
Description
Memory Set. These instructions perform a memory set using the value in the bottom byte of the source register. The prologue, main, and epilogue instructions are expected to be run in succession and to appear consecutively in memory: SETP, then SETM, and then SETE. SETP performs some preconditioning of the arguments suitable for using the SETM instruction, and performs an IMPLEMENTATION DEFINED amount of the memory set. SETM performs an IMPLEMENTATION DEFINED amount of the memory set. SETE performs the last part of the memory set. The architecture supports two algorithms for the memory set: option A and option B. Which algorithm is used is IMPLEMENTATION DEFINED. After execution of SETP, option A (which results in encoding PSTATE.C = 0): After execution of SETP, option B (which results in encoding PSTATE.C = 1): For SETM, option A (encoded by PSTATE.C = 0), the format of the arguments is: For SETM, option B (encoded by PSTATE.C = 1), the format of the arguments is: For SETE, option A (encoded by PSTATE.C = 0), the format of the arguments is: For SETE, option B (encoded by PSTATE.C = 1), the format of the arguments is:
Operation
CheckMOPSEnabled();
CheckSETConstrainedUnpredictable(memset.n, memset.d, memset.s);
bits(8) data = X[memset.s, 8];
integer B;
memset.is_setg = FALSE;
memset.nzcv = PSTATE.<N,Z,C,V>;
memset.toaddress = X[memset.d, 64];
if memset.stage == MOPSStage_Prologue then
memset.setsize = UInt(X[memset.n, 64]);
else
memset.setsize = SInt(X[memset.n, 64]);
memset.implements_option_a = SETOptionA();
boolean privileged = if options<0> == '1' then AArch64.IsUnprivAccessPriv() else PSTATE.EL != EL0;
AccessDescriptor accdesc = CreateAccDescMOPS(MemOp_STORE, privileged, nontemporal);
if memset.stage == MOPSStage_Prologue then
if memset.setsize > 0x7FFFFFFFFFFFFFFF then
memset.setsize = 0x7FFFFFFFFFFFFFFF;
if memset.implements_option_a then
memset.nzcv = '0000';
memset.toaddress = memset.toaddress + memset.setsize;
memset.setsize = 0 - memset.setsize;
else
memset.nzcv = '0010';
memset.stagesetsize = MemSetStageSize(memset);
if memset.stage != MOPSStage_Prologue then
CheckMemSetParams(memset, options);
AddressDescriptor memaddrdesc;
PhysMemRetStatus memstatus;
integer memory_set;
boolean fault = FALSE;
if memset.implements_option_a then
while memset.stagesetsize < 0 && !fault do
// IMP DEF selection of the block size that is worked on. While many
// implementations might make this constant, that is not assumed.
B = SETSizeChoice(memset, 1);
assert B <= -1 * memset.stagesetsize;
(memory_set, memaddrdesc, memstatus) = MemSetBytes(memset.toaddress + memset.setsize, data, B, accdesc);
if memory_set != B then
fault = TRUE;
else
memset.setsize = memset.setsize + B;
memset.stagesetsize = memset.stagesetsize + B;
else
while memset.stagesetsize > 0 && !fault do
// IMP DEF selection of the block size that is worked on. While many
// implementations might make this constant, that is not assumed.
B = SETSizeChoice(memset, 1);
assert B <= memset.stagesetsize;
(memory_set, memaddrdesc, memstatus) = MemSetBytes(memset.toaddress, data, B, accdesc);
if memory_set != B then
fault = TRUE;
else
memset.toaddress = memset.toaddress + B;
memset.setsize = memset.setsize - B;
memset.stagesetsize = memset.stagesetsize - B;
UpdateSetRegisters(memset, fault, memory_set);
if fault then
if IsFault(memaddrdesc) then
AArch64.Abort(memaddrdesc.vaddress, memaddrdesc.fault);
else
boolean iswrite = TRUE;
HandleExternalAbort(memstatus, iswrite, memaddrdesc, B, accdesc);
if memset.stage == MOPSStage_Prologue then
PSTATE.<N,Z,C,V> = memset.nzcv;