smlal

Signed Multiply Accumulate Long (Thumb)

SMLAL <RdLo>, <RdHi>, <Rn>, <Rm>

Signed Multiply Accumulate (64-bit result).

Details

Signed Multiply Accumulate Long: Multiplies the signed 32-bit values in Rn and Rm, accumulates the 64-bit result with the value in RdHi:RdLo, and writes the 64-bit result back to RdHi:RdLo. The condition flags are not affected. This instruction is available in Thumb state (T32) and A32.

Pseudocode Operation

product ← SignExtend(Rn, 64) × SignExtend(Rm, 64)
accumulator ← (RdHi << 32) | RdLo
result ← accumulator + product
RdLo ← result[31:0]
RdHi ← result[63:32]

Example

SMLAL r1, r0, r1, r2

Encoding

Binary Layout
111110111
100
Rn
RdLo
RdHi
0000
Rm
 
Format Thumb Mul
Opcode 0xFBC00000
Extension A32 (Base)

Operands

  • RdLo
    Low
  • RdHi
    High
  • Rn
    First source / base general-purpose register
  • Rm
    Second source / offset general-purpose register

Reference (Arm AArch32 ISA)

Instruction Forms

Encoding Instruction ISA Bit pattern
0x00E00090 SMLAL{<c>}{<q>} <RdLo>, <RdHi>, <Rn>, <Rm> A32 cond | 0000 | 111 | 0 | RdHi | RdLo | Rm | 1001 | Rn
0xFBC00000 SMLAL{<c>}{<q>} <RdLo>, <RdHi>, <Rn>, <Rm> T32 111110111 | 100 | Rn | RdLo | RdHi | 0000 | Rm

Description

Signed Multiply Accumulate Long multiplies two signed 32-bit values to produce a 64-bit value, and accumulates this with a 64-bit value. In A32 instructions, the condition flags can optionally be updated based on the result. Use of this option adversely affects performance on many implementations.

Operation

if ConditionPassed() then
    EncodingSpecificOperations();
    result = SInt(R[n]) * SInt(R[m]) + SInt(R[dHi]:R[dLo]);
    R[dHi] = result<63:32>;
    R[dLo] = result<31:0>;
    if setflags then
        PSTATE.N = result<63>;
        PSTATE.Z = IsZeroBit(result<63:0>);
        // PSTATE.C, PSTATE.V unchanged