sm3partw1
SM3 Part Word 1 (A32)
SM3PARTW1.32 <Qd>, <Qn>, <Qm>
SM3 schedule update part 1.
Details
The SM3 Part Word 1 instruction sM3 schedule update part 1.
Pseudocode Operation
// SM3 schedule update part 1
Example
SM3PARTW1.32 q0, q1, q2
Encoding
Binary Layout
11110010
0
0
10
Vn
Vd
1100
N
Q
M
1
Vm
Operands
-
Qd
Destination 128-bit SIMD register -
Qn
First source 128-bit SIMD register -
Qm
Second source 128-bit SIMD register