aesimc

AES Inverse Mix Columns (A32)

AESIMC.8 <Qd>, <Qm>

AES Inverse Mix Columns transformation.

Details

Applies the AES Inverse MixColumns (inverse) transformation to each column of the 128-bit state in Qm and writes the result to Qd. This transformation reverses the forward MixColumns operation and is used in equivalent inverse cipher key expansion during AES decryption. This instruction does not modify the condition flags. Available in A32/T32 with Crypto extension and requires AES feature.

Pseudocode Operation

Qd ← AESInverseMixColumns(Qm)

Example

AESIMC.8 q0, q2

Encoding

Binary Layout
11110011
1
D
11
00
10
Vd
00111
Q
M
0
Vm
 
Format Crypto 2-Reg
Opcode 0xF3B003C0
Extension Crypto

Operands

  • Qd
    Destination 128-bit SIMD register
  • Qm
    Second source 128-bit SIMD register

Reference (Arm A64 ISA)

Instruction Forms

Encoding Instruction ISA Bit pattern
0x4E287800 AESIMC <Vd>.16B, <Vn>.16B A64 01001110 | 00 | 101000011 | 1 | 10 | Rn | Rd
0x4520E400 AESIMC <Zdn>.B, <Zdn>.B A64 01000101 | 0 | 0 | 10000011100 | 1 | 00000 | Zdn

Description

AES inverse mix columns.

Operation

AArch64.CheckFPAdvSIMDEnabled();

bits(128) operand = V[n, 128];
bits(128) result;
result = AESInvMixColumns(operand);
V[d, 128] = result;