crc32w

CRC32 Word (A32)

CRC32W<c> <Rd>, <Rn>, <Rm>

CRC32 checksum update (Word).

Pseudocode Operation

Rd ← CRC32_POLYNOMIAL(Rn, Rm[31:0])

Example

CRC32W r0, r1, r2

Encoding

Binary Layout
cond
31:28
00010
27:23
10
22:21
0
20
Rn
19:16
Rd
15:12
0
11
0
10
0
9
0
8
0100
7:4
Rm
3:0
 
Format Data Proc
Opcode 0x01400040
Extension CRC

Operands

  • Rd
    Destination general-purpose register
  • Rn
    Acc
  • Rm
    Data

Related

Other forms of crc32w

More in CRC

Reference

View in Arm A64 ISA Reference ↗ Arm AArch32 ISA

Instruction Forms

Encoding Instruction ISA Bit pattern
0x01400040 CRC32W{<q>} <Rd>, <Rn>, <Rm> A32 cond | 00010 | 10 | 0 | Rn | Rd | 0 | 0 | 0 | 0 | 0100 | Rm
0xFAC0F0A0 CRC32W{<q>} <Rd>, <Rn>, <Rm> T32 111110101 | 10 | 0 | Rn | 1111 | Rd | 10 | 10 | Rm

Description

CRC32 performs a cyclic redundancy check (CRC) calculation on a value held in a general-purpose register. It takes an input CRC value in the first source operand, performs a CRC on the input value in the second source operand, and returns the output CRC value. The second source operand can be 8, 16, or 32 bits. To align with common usage, the bit order of the values is reversed as part of the operation, and the polynomial 0x04C11DB7 is used for the CRC calculation. In an Armv8.0 implementation, this is an optional instruction. From Armv8.1, it is mandatory for all implementations to implement this instruction.

Operation

if ConditionPassed() then
    EncodingSpecificOperations();

    acc = R[n];             // accumulator
    val = R[m]<size-1:0>;   // input value
    poly = (if crc32c then 0x1EDC6F41 else 0x04C11DB7)<31:0>;
    tempacc = BitReverse(acc):Zeros(size);
    tempval = BitReverse(val):Zeros(32);
    // Poly32Mod2 on a bitstring does a polynomial Modulus over {0,1} operation
    R[d] = BitReverse(Poly32Mod2(tempacc EOR tempval, poly));