cmeq

Vector Compare Equal

CMEQ <Vd>.<T>, <Vn>.<T>, <Vm>.<T>

Compares elements (Vn == Vm) and sets bits to all 1s or 0s.

Details

The Vector Compare Equal instruction compares elements (Vn == Vm) and sets bits to all 1s or 0s.

Pseudocode Operation

// Compares elements (Vn == Vm) and sets bits to all 1s or 0s

Example

CMEQ v0.4s.T, v1.4s.T, v2.4s.T

Encoding

Binary Layout
0
Q
101110
size
10001
Rm
1000
Rn
Rd
 
Format SIMD Three Register
Opcode 0x2E208C00
Extension NEON (SIMD)

Operands

  • Vd
    Destination SIMD/FP vector register
  • Vn
    First source SIMD/FP vector register
  • Vm
    Second source SIMD/FP vector register