fmov
Floating-point Move (Immediate)
FMOV <Dd>, #<imm>
Moves immediate value into floating-point register.
Details
Moves an 8-bit encoded immediate value into a 64-bit double-precision floating-point register Dd. The immediate is expanded to a full 64-bit floating-point value according to the VFPv3 expanded-immediate encoding scheme. The condition flags NZCV are not affected. This is an AArch64-only instruction requiring the Floating-Point extension.
Pseudocode Operation
Dd ← ExpandImmediate(imm8)
Example
FMOV d0, #16
Encoding
Binary Layout
0
0
0
11110
01
1
imm8
100
00000
Rd
Operands
-
Dd
Destination 64-bit SIMD/FP register -
imm
Signed immediate value
Reference (Arm A64 ISA)
Instruction Forms
| Encoding | Instruction | ISA | Bit pattern | ||
|---|---|---|---|---|---|
| 0x0F00FC00 | FMOV <Vd>.<T>, #<imm> | A64 | 0 | Q | 0 | 0111100000 | a | b | c | 1111 | 1 | 1 | d | e | f | g | h | Rd | ||
| 0x0F00F400 | FMOV <Vd>.<T>, #<imm> | A64 | 0 | Q | 0 | 0111100000 | a | b | c | 1111 | 0 | 1 | d | e | f | g | h | Rd | ||
| 0x6F00F400 | FMOV <Vd>.2D, #<imm> | A64 | 0 | 1 | 1 | 0111100000 | a | b | c | 1111 | 0 | 1 | d | e | f | g | h | Rd | ||
| 0x05104000 | FMOV <Zd>.<T>, <Pg>/M, #0.0 | A64 | 00000101 | size | 01 | Pg | 0 | 1 | 0 | 00000000 | Zd | ||
| 0x2538C000 | FMOV <Zd>.<T>, #0.0 | A64 | 00100101 | size | 111 | 0 | 0 | 011 | 0 | 00000000 | Zd | ||
| 0x0510C000 | FMOV <Zd>.<T>, <Pg>/M, #<const> | A64 | 00000101 | size | 01 | Pg | 110 | imm8 | Zd | ||
| 0x2539C000 | FMOV <Zd>.<T>, #<const> | A64 | 00100101 | size | 111 | 0 | 0 | 111 | 0 | imm8 | Zd | ||
| 0x1EE04000 | FMOV <Hd>, <Hn> | A64 | 0 | 0 | 0 | 11110 | 11 | 10000 | 00 | 10000 | Rn | Rd | ||
| 0x1E204000 | FMOV <Sd>, <Sn> | A64 | 0 | 0 | 0 | 11110 | 00 | 10000 | 00 | 10000 | Rn | Rd | ||
| 0x1E604000 | FMOV <Dd>, <Dn> | A64 | 0 | 0 | 0 | 11110 | 01 | 10000 | 00 | 10000 | Rn | Rd | ||
| 0x1EE60000 | FMOV <Wd>, <Hn> | A64 | 0 | 0 | 0 | 11110 | 11 | 1 | 00 | 110 | 000000 | Rn | Rd | ||
| 0x9EE60000 | FMOV <Xd>, <Hn> | A64 | 1 | 0 | 0 | 11110 | 11 | 1 | 00 | 110 | 000000 | Rn | Rd | ||
| 0x1EE70000 | FMOV <Hd>, <Wn> | A64 | 0 | 0 | 0 | 11110 | 11 | 1 | 00 | 111 | 000000 | Rn | Rd | ||
| 0x1E270000 | FMOV <Sd>, <Wn> | A64 | 0 | 0 | 0 | 11110 | 00 | 1 | 00 | 111 | 000000 | Rn | Rd |
Description
Floating-point move immediate (scalar). This instruction copies a floating-point immediate constant into the SIMD&FP destination register.
Depending on the settings in the CPACR_EL1, CPTR_EL2, and CPTR_EL3 registers, and the current Security state and Exception level, an attempt to execute the instruction might be trapped.
Operation
CheckFPEnabled64(); V[d, datasize] = imm;