vrshr

Vector Rounding Shift Right

VRSHR<c>.<dt> <Qd>, <Qm>, #<imm>

Shifts right with rounding based on immediate.

Details

The Vector Rounding Shift Right instruction shifts right with rounding based on immediate.

Pseudocode Operation

// Shifts right with rounding based on immediate

Example

VRSHR.dt q0, q2, #16

Encoding

Binary Layout
11110010
1
D
imm6
Vd
0010
L
Q
M
1
Vm
 
Format NEON Shift
Opcode 0xF2800210
Extension NEON (SIMD)

Operands

  • Qd
    Destination 128-bit SIMD register
  • Qm
    Second source 128-bit SIMD register
  • imm
    Signed immediate value