vcle

Vector Compare Less Than or Equal

VCLE<c>.<dt> <Qd>, <Qn>, <Qm>

Compares elements (<=). Alias for VCGE with swapped operands.

Details

Vector Compare Less Than or Equal is an alias that performs signed element-wise comparison on 128-bit SIMD registers with operands swapped relative to VCGE. For each element in Qn, if it is less than or equal to the corresponding element in Qm, the result element in Qd is set to all 1s; otherwise, it is set to all 0s. No condition flags are affected. This is a NEON instruction available in both A32 and T32 states.

Pseudocode Operation

for i = 0 to (128 / element_size) - 1 do
  if Qn[i] <= Qm[i] then
    Qd[i] ← all_ones
  else
    Qd[i] ← all_zeros
  end if
end for

Example

VCLE.dt q0, q1, q2

Encoding

Binary Layout
1111001
U
0
D
size
Vn
Vd
0011
N
0
M
1
Vm
 
Format NEON Alias
Opcode 0xF2000310
Extension NEON (SIMD)

Operands

  • Qd
    Destination 128-bit SIMD register
  • Qn
    First source 128-bit SIMD register
  • Qm
    Second source 128-bit SIMD register

Reference (Arm AArch32 ISA)

Instruction Forms

Encoding Instruction ISA Bit pattern
0xF3B10180 VCLE{<c>}{<q>}.<dt> {<Dd>,} <Dm>, #0 A32 111100111 | D | 11 | size | 01 | Vd | 0 | F | 011 | 0 | M | 0 | Vm
0xF3B101C0 VCLE{<c>}{<q>}.<dt> {<Qd>,} <Qm>, #0 A32 111100111 | D | 11 | size | 01 | Vd | 0 | F | 011 | 1 | M | 0 | Vm
0xFFB10180 VCLE{<c>}{<q>}.<dt> {<Dd>,} <Dm>, #0 T32 111111111 | D | 11 | size | 01 | Vd | 0 | F | 011 | 0 | M | 0 | Vm
0xFFB101C0 VCLE{<c>}{<q>}.<dt> {<Qd>,} <Qm>, #0 T32 111111111 | D | 11 | size | 01 | Vd | 0 | F | 011 | 1 | M | 0 | Vm
0xF2000310 VCLE{<c>}{<q>}.<dt> {<Dd>, }<Dn>, <Dm> A32 1111001 | U | 0 | D | size | Vn | Vd | 0011 | N | 0 | M | 1 | Vm
0xF2000350 VCLE{<c>}{<q>}.<dt> {<Qd>, }<Qn>, <Qm> A32 1111001 | U | 0 | D | size | Vn | Vd | 0011 | N | 1 | M | 1 | Vm
0xF3000E00 VCLE{<c>}{<q>}.<dt> {<Dd>, }<Dn>, <Dm> A32 1111001 | 1 | 0 | D | 0 | sz | Vn | Vd | 1110 | N | 0 | M | 0 | Vm
0xF3000E40 VCLE{<c>}{<q>}.<dt> {<Qd>, }<Qn>, <Qm> A32 1111001 | 1 | 0 | D | 0 | sz | Vn | Vd | 1110 | N | 1 | M | 0 | Vm
0xEF000310 VCLE{<c>}{<q>}.<dt> {<Dd>, }<Dn>, <Dm> T32 111 | U | 11110 | D | size | Vn | Vd | 0011 | N | 0 | M | 1 | Vm
0xEF000350 VCLE{<c>}{<q>}.<dt> {<Qd>, }<Qn>, <Qm> T32 111 | U | 11110 | D | size | Vn | Vd | 0011 | N | 1 | M | 1 | Vm
0xFF000E00 VCLE{<c>}{<q>}.<dt> {<Dd>, }<Dn>, <Dm> T32 111 | 1 | 11110 | D | 0 | sz | Vn | Vd | 1110 | N | 0 | M | 0 | Vm
0xFF000E40 VCLE{<c>}{<q>}.<dt> {<Qd>, }<Qn>, <Qm> T32 111 | 1 | 11110 | D | 0 | sz | Vn | Vd | 1110 | N | 1 | M | 0 | Vm

Description

Vector Compare Less Than or Equal takes each element in a vector, and compares it with the corresponding element of a second vector. If the first is less than or equal to the second, the corresponding element in the destination vector is set to all ones. Otherwise, it is set to all zeros.