tlbi

TLB Invalidate (VA)

TLBI VAE1, <Xt>

Invalidates TLB entries by Virtual Address.

Details

Invalidates TLB entries matching the virtual address supplied in the register operand, at the current exception level. This is an AArch64-only instruction requiring EL1 or higher privilege. No condition flags are affected; the instruction generates an exception if executed at EL0.

Pseudocode Operation

TLBInvalidateByVA(Xt, EL1); DSB(SY); ISB()

Example

TLBI VAE1, x3

Encoding

Binary Layout

1101010100

op1

CRn

CRm

op2

Format System

Opcode 0xD5088000

Extension Base (System)

Operands

Xt
VA

Reference (Arm A64 ISA)

Instruction Forms

Encoding	Instruction		ISA		Bit pattern
0xD5088000	TLBI <tlbi_op>{, <Xt>}		A64		1101010100 \| 0 \| 01 \| op1 \| CRn \| CRm \| op2 \| Rt

Description

TLB Invalidate operation. For more information, see op0==0b01, cache maintenance, TLB maintenance, and address translation instructions.