vrintx

Vector Round Floating-Point (Exact)

VRINTX<c>.F32 <Sd>, <Sm>

Rounds float to integral float, raising Inexact exception.

Pseudocode Operation

for i = 0 to 0 do
  Sd[i] ← RoundToNearest(Sm[i])
  if Sd[i] != Sm[i] then
    FPExc_IXC ← 1
  end if
end for

Example

VRINTX.F32 s0, s2

Encoding

Binary Layout
cond
31:28
11101
27:23
D
22
11
21:20
0
19
111
18:16
Vd
15:12
10
11:10
10
9:8
0
7
1
6
M
5
0
4
Vm
3:0
 
Format VFP Unary
Opcode 0x0EB70A40
Extension VFP (Float)

Operands

  • Sd
    Destination 32-bit floating-point register
  • Sm
    Second source 32-bit floating-point register

Related

More in VFP (Float)

Reference

View in Arm A64 ISA Reference ↗ Arm AArch32 ISA

Instruction Forms

Encoding Instruction ISA Bit pattern
0xF3B20480 VRINTX{<q>}.<dt> <Dd>, <Dm> A32 111100111 | D | 11 | size | 10 | Vd | 0 | 1001 | 0 | M | 0 | Vm
0xF3B204C0 VRINTX{<q>}.<dt> <Qd>, <Qm> A32 111100111 | D | 11 | size | 10 | Vd | 0 | 1001 | 1 | M | 0 | Vm
0xFFB20480 VRINTX{<q>}.<dt> <Dd>, <Dm> T32 111111111 | D | 11 | size | 10 | Vd | 0 | 1001 | 0 | M | 0 | Vm
0xFFB204C0 VRINTX{<q>}.<dt> <Qd>, <Qm> T32 111111111 | D | 11 | size | 10 | Vd | 0 | 1001 | 1 | M | 0 | Vm
0x0EB70940 VRINTX{<c>}{<q>}.F16 <Sd>, <Sm> A32 cond | 11101 | D | 11 | 0 | 111 | Vd | 10 | 01 | 0 | 1 | M | 0 | Vm
0x0EB70A40 VRINTX{<c>}{<q>}.F32 <Sd>, <Sm> A32 cond | 11101 | D | 11 | 0 | 111 | Vd | 10 | 10 | 0 | 1 | M | 0 | Vm
0x0EB70B40 VRINTX{<c>}{<q>}.F64 <Dd>, <Dm> A32 cond | 11101 | D | 11 | 0 | 111 | Vd | 10 | 11 | 0 | 1 | M | 0 | Vm
0xEEB70940 VRINTX{<c>}{<q>}.F16 <Sd>, <Sm> T32 111011101 | D | 11 | 0 | 111 | Vd | 10 | 01 | 0 | 1 | M | 0 | Vm
0xEEB70A40 VRINTX{<c>}{<q>}.F32 <Sd>, <Sm> T32 111011101 | D | 11 | 0 | 111 | Vd | 10 | 10 | 0 | 1 | M | 0 | Vm
0xEEB70B40 VRINTX{<c>}{<q>}.F64 <Dd>, <Dm> T32 111011101 | D | 11 | 0 | 111 | Vd | 10 | 11 | 0 | 1 | M | 0 | Vm

Description

Round floating-point to integer inexact rounds a floating-point value to an integral floating-point value of the same size, using the rounding mode specified in the FPSCR, and raises an Inexact exception when the result value is not numerically equal to the input value. A zero input gives a zero result with the same sign, an infinite input gives an infinite result with the same sign, and a NaN is propagated as for normal arithmetic.

Operation

if ConditionPassed() then
    EncodingSpecificOperations(); CheckVFPEnabled(TRUE);
    rounding = FPRoundingMode(FPSCR[]);
    case esize of
        when 16
            S[d] = Zeros(16) : FPRoundInt(S[m]<15:0>, FPSCR[], rounding, exact);
        when 32
            S[d] = FPRoundInt(S[m], FPSCR[], rounding, exact);
        when 64
            D[d] = FPRoundInt(D[m], FPSCR[], rounding, exact);